[visionegg] working code for fMRI exp: comments please

Hi

Here the code (main loop) of a small visionegg project, which waits for
a trigger on the parallel port, after a received trigger it updates the
screen with the next stimulus, and all mouse-responses are logged in a
file with the RT (relative to the actual stimulus). Also all stimuli are
logged into a file with stimulus-name and onset-time

What do you think about the timing-quality?

--
while (not pygame.event.peek((QUIT,KEYDOWN))):
    while (not pygame.event.peek((QUIT,KEYDOWN))):
        #log the mouse response (which button, and RT)
        for event in pygame.event.get(pygame.locals.MOUSEBUTTONDOWN): 
            if event.button == 1:
                response_log.append(VisionEgg.time_func() - stim_onset)
                response_log.append('left')
            elif event.button == 3:
                response_log.append(VisionEgg.time_func() - stim_onset)
                response_log.append('right')
        #poll the LPT for the TTL trigger, sent by the MR scanner
        #only poll the lpt, if the last pulse went to 0 
        #(counter = pulslength of the TTL signal)
        counter = VisionEgg.time_func() - stim_onset 
        if counter > 1.1:    
            input_value = raw_lpt_module.inp(0x379) & 0x20  #pin nr 12
            #if TTL signal on lpt, increment the stim_index
            if (input_value == 0) and (stim_index < num_images - 1): 
                stim_index = stim_index + 1
                break #leave the loop and update the screen

    # draw the stimulus
    stimulus.parameters.texture = preloaded_texture_list[stim_index]
    screen.clear()
    viewport.draw()
    swap_buffers()
    stim_onset = VisionEgg.time_func()  
    if stim_index == 1: #if it is the first stimulus, log start time
        start_time = stim_onset   
--

Andrew, if I sync buffer-swapping: does the swap_buffers() code wait for
the vsync pulse, and therefore during this time I will have an
unprecision in the RT?

thanks for any feedback. 

the only thing not working properly is the fact, that with the code
above I wait for a TTL signal going from 1 to 0. Unfortunately the port
doesn't detect a TTL going from 0 to 1. Any help appreciated.

Christoph

-- 
Christoph Lehmann <lehmann@xxxxxxxxxxxx>
University Hospital of Clinical Psychiatry

======================================
The Vision Egg mailing list
Archives: http://www.freelists.org/archives/visionegg
Website: http://www.visionegg.org/mailinglist.html

Other related posts: