Hi, I have a 6 layers PCB with this stackup : Top - Signal/ fill with GND Prepeg : 4.6 Int1 : ground plane Core : 5.0 Int2 : Signal/ fill with PWR Prepeg : 33.5 Int3 : Signal/ fill with GND Core : 5 Int4 : Split power plane 3.3V/5V Prepeg : 4.6 Bottom : Signal/fill with GND The dimensions for the core and prepeg are in mils and my operating frequency is 100Mhz. The board is a PCI card. So do you think that I have to worry about the frequencies above 500Mhz because of the lack of power plane decoupling in my stackup? I read somewhere that the advantages of tight coupling between the signal (trace) layers and the current return planes will more than outweigh the disadvantage caused by the slight loss in interplane capacitance. That is why my PCB stackup has a large Prepeg in the middle to have a better coupling between traces and return current. thanks. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu