[SI-LIST] Re: si-list@freelists.org

  • From: Bill Wurst <billw@xxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Mon, 18 Apr 2005 12:01:54 -0400

Rui,

You are correct to be concerned about the field saturating the ferrite 
material and adversely impacting its filtering capabilities.  At what 
frequency does the magnetic field change, or is it a dc field?

Ferrite beads will saturate with higher levels of dc current passing 
through them.  The Fair-Rite company (http://www.fair-rite.com/) has 
done a good job of documenting the decrease in bead impedance at various 
dc current levels for their own beads.  Perhaps Murata has also.  Be 
persistent and if you don't get satisfactory answers, find another bead 
supplier that will work with you.

    -Bill

========================
Rui Pimenta wrote:

>Dear Mark and Tim,
>
>Apart from the force, I am worried that at such magnetic field will change 
>their
>properties. Probably they will saturate and then the filter will become 
>another thing.
>
>In terms of frequency I want as fast as possible. I will have optical 
>transceivers close
>to the FPGA ~ 6 in.
>
>I did not contact Murata, I'll do it right away. But if you could get some 
>information
>from them would be great.
>
>Did you, (Mark/Xilinx), do any tests without these ferrite beads? 
>
>Thank you once more,
>Rui Pimenta
>
>
>
>On Mon, 18 Apr 2005 08:23:57 -0600
>"Mark Alexander" <mark.alexander@xxxxxxxxxx> wrote:
>
>  
>
>>Rui,
>>
>>Are you concerned that these Ferrite beads will experience a force from
>>the 5T field?  I haven't looked into this myself.  Have you consulted
>>Murata on the matter?  I've got a contact over there I can check with if
>>you like.
>>
>>As for the frequencies you're operating at... Tim wasn't quite right
>>with his comment.  Lower data rates don't necessarily equate to higher
>>jitter tolerance or power supply noise rejection, as the vulnerabilities
>>of the CDR are fairly complex.  Our testing suggests that the best
>>jitter tolerance is achieved between 2.5 Gbps and 3.125 Gbps for the
>>Virtex-2 Pro RocketIO transceivers.
>>
>>-mark
>>
>>
>>
>>-----Original Message-----
>>From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>>On Behalf Of Rui Pimenta
>>Sent: Monday, April 18, 2005 4:55 PM
>>To: si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] si-list@xxxxxxxxxxxxx
>>
>>Dear all, 
>>
>>I am designing a new PCB boards which contains the Virtex-II pro
>>XC2VP50-5FF1152C. I want
>>to use 12 RocketIO Transceivers with speeds above 1Gb/s. 
>>
>>These boards will be working in a heavy-ion detector under a magnetic
>>field of ~5 Tesla.
>> 
>>^^^^^^^^
>>
>>As discribed, in Xilinx user guide ug024 page 111, it is recommended the
>>use of ferrite
>>beads from Murata for the power filtering on each transceiver power pin.
>>
>>Since I have a magnetic field of ~5 Tesla I have some questions:
>>
>>1- Is there any other way of designing these power filters without using
>>ferrite/coils,
>>and similar performance?
>>
>>2- What are the risks that I will be taken if I don't place the ferrite?
>>The RocketIOs
>>will not work?
>>
>>3- Any suggestions for overcome this issue?
>>
>>
>>I have inquired Xilinx on this matter and I am waiting for their answer.
>>What I am afraid
>>is that their answer may include something like: We cannot guarantee
>>anything that goes
>>out of specs. Which doesn't help me.
>>
>>That is why I am contacting the list seeking for suggestions/advises.
>>
>>Thanks in advance,
>>Rui Pimenta
>>
>>
>>    
>>
>  
>
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