[SI-LIST] series switches in DDR2 designs

 
Hi All, 

I was wondering why are the ibis series switch devices used in the DDR2
designs. Thats the first question.

I am aware of the ibis models with the series switches and their usage
in the SI simulations. 

From a logic and design point of view, why are they needed?

I have come across a complex switch model from TI, ts3l500ae, link
provided below.

http://focus.ti.com/docs/prod/folders/print/ts3l500ae.html

It has two series switches for a single net and it has two functions. 

Can someone please educate me on these usage and implementations in the
designs?

Thanks, 

Sivaram
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