[SI-LIST] Re: routing decoupling caps.
- From: Ray Anderson <reanderson@xxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Sun, 24 Oct 2004 07:46:19 -0700
Moshe Frid wrote:
>Hi all
>
>can someone explain the right way to rout a decoupling cap. that placed
>near the power pin of a big component
>the pcb have aground and power planes. the pin and the cap. have them
>own via.
>should I connect the cap to the pin at the top layer
>
>tanks.
>
>
>
.I would recommend that the decoupling capacitors be attached directly
to the power and ground planes and that the chip you want to decouple
should also be connected directly to the power and ground planes. The
use of a trace between the chip power pin and the decoupling capacitors
is not recommended.
Be sure to use proper, low inductance technique in the mounting of your
decoupling capacitors. This means minimizing the mounted inductance by
minimizing the current loop area seen by the decap (i.e. the vias should
be as close together as practical, the planes should be closely spaced
(4 mils or less is preferable), and mount the decaps on the side of the
board closest to the power/ground plane pair if possible.)
-Ray Anderson
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- References:
- [SI-LIST] routing decoupling caps.
- From: Moshe Frid
Other related posts:
- » [SI-LIST] routing decoupling caps.
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- [SI-LIST] routing decoupling caps.
- From: Moshe Frid