Moshe Frid wrote: >Hi all > >can someone explain the right way to rout a decoupling cap. that placed >near the power pin of a big component >the pcb have aground and power planes. the pin and the cap. have them >own via. >should I connect the cap to the pin at the top layer > >tanks. > > > .I would recommend that the decoupling capacitors be attached directly to the power and ground planes and that the chip you want to decouple should also be connected directly to the power and ground planes. The use of a trace between the chip power pin and the decoupling capacitors is not recommended. Be sure to use proper, low inductance technique in the mounting of your decoupling capacitors. This means minimizing the mounted inductance by minimizing the current loop area seen by the decap (i.e. the vias should be as close together as practical, the planes should be closely spaced (4 mils or less is preferable), and mount the decaps on the side of the board closest to the power/ground plane pair if possible.) -Ray Anderson ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu