[SI-LIST] Re: power planes on adjacentlayers crossing each other
- From: <Wolfgang.Maichen@xxxxxxxxxxxx>
- To: <olaney@xxxxxxxxx>, <weirsi@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 11 Jul 2014 06:18:07 +0000
I would agree that capacitive(!) coupling between the planes is likely not
going to be a big issue. Much more significant in this case is inductive
coupling, which basically depends on the amount of loop area shared between the
two supply currents. Just because you DEFINE layer 5 to be ground (better:
return) for layer 6 (and 8 to be ground for layer 7) does not necessarily mean
the return currents will behave that way. There is a good chance at least part
of each return current will flow on the respective other plane, and this loop
then encloses a lot of the respective other loop.
A good 2.5D or 3D fields solver can give a definitive answer in your specific
case.
Wolfgang
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Orin Laney
Sent: Friday, July 11, 2014 12:29 AM
To: weirsi@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: power planes on adjacentlayers crossing each other
Greetings, Steve.
Key phrase: ridiculous ways. It's a problem I've rarely seen because it is
"truly unusual", and my own designs intuitively avoid such problems. But, that
said, there is no bound on human stupidity and Murphy rules the universe.
There is a certain enhancement of my consulting income from clients who don't
comprehend my advice the first time, or the second, or the third... Of course,
I prefer the ones who get it so quickly they almost finish my sentences for me,
even if the result is shorter gigs. You know the drill.
Orin
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of steve weir
Sent: Thursday, July 10, 2014 1:56 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: power planes on adjacentlayers crossing each other
Orin, I would be careful about qualifying that blanket statement. There are
well documented case histories where that assumption was applied in somewhat
ridiculous ways with the predictably disastrous results.
Best Regards,
Steve
On 7/10/2014 12:37 PM, Orin Laney wrote:
> No, not a concern. This forum chats a lot about high speed signals
> crossing plane splits, but the various power supplies are not high
> speed
signals.
> High Sometimes people worry about noise coupling through the small
> common capacitance, but unless your needs are truly unusual, such
> coupling is so small compared to the bypass capacitances that it is of
> no
consequence.
>
> Note that high speed signals outside of this portion of the stack up
> will see only your ground planes and not be affected by the split
> power planes or their overlapping portions.
>
> Orin
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Ashok Srinivas
> Sent: Thursday, July 10, 2014 12:13 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] power planes on adjacentlayers crossing each other
>
> Hi SI-LIST,
> We are using a 12 layer PCB stack up and have power planes on layer 6
> and layer 7 (just to clarify layers 6 and 7 are not power planes
> completely but its more like a power plane island). These power planes
> on layers 6 and 7 cross each other.
>
> I will use layer 5 to ground the layer 6 power plane and similarly use
> layer
> 8 to ground the layer 7 power plane.
>
> Is this crossing a concern ?if yes why?
>
> Thanks!
> --
> Ashok
>
>
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--
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