This is a job opportunity for Cisco Systems, San Jose, CA. Please send me resumes if interested and applicable. Thanks, Judy ===================================================== This position is a senior level system level signal integrity engineer, with requirements in both circuit modeling and lab measurement. A candidate must have a strong technical foundation that includes expertise in transmission lines, packaging, power integrity, noise management, timing analysis, high speed design, and various I/O technologies. Responsibilities will include developing electrical board design rules, termination and decoupling strategies, noise characterization, Serdes link design, connector characterization, high speed signal integrity, and timing verification in simulation and lab. Must work well with the design team members, but be able to deliver individual results. Minimum BSEE with 7-10 years relevant experience required, MSEE/PhD is preferred. Must have experience with HSPICE, TDR or VNA. Experience with Spectraquest, Spectre, MATLAB is desired. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu