[SI-LIST] Re: Undershoot on a cPCI Bus
- From: "Dr. Edward P. Sayre" <esayre@xxxxxxxx>
- To: bfields@xxxxxxxx, <si-list@xxxxxxxxxxxxx>
- Date: Sat, 08 Oct 2005 20:19:24 -0400
Brian:
I am assuming that you are dealing with a fully populated backplane. If
not, you have some other problems.
If you have a fully populated backplane, the driving point or operating
impedance is very low, perhaps as low as 12 ohms due to the capacitive
loading of the connectors and cards. The logic voltages do not achieve
stable levels until the wave transverses the entire backplane a couple of
times. cPCI IS NOT incident wave switching. The undershoot you are seeing
is the result of the large current being drawn out of your
driver. Increase the series resistance if you want to reduce the
undershoot. There is a good paper on the NESA web site about computing the
working backplane impedance.
ed sayre
============================
At 10:13 AM 10/7/2005 -0600, Fields, Brian wrote:
>I'm simulating a Compact PCI backplane, and have found that the signals
>show an undershoot of which is outside the manufacturers maximum
>operating conditions. The FPGA devices on the bus all have internal
>clamping diodes, however the voltage at which they start to conduct is
>also outside the operating range.=20
>
>Simulations with external Schottky clamping diodes show that the
>transient ringing which produces the undershoot lasts for about 2ns, too
>fast for the external diodes to respond. There are 10ohm series
>resistors on each of the daughter cards signal lines, per the spec, and
>any termination scheme would have to be implemented on the backplane.
>
>Any ideas? I'm stumped.
>
>
>Thanks,
>
>Brian Fields
>Ball Aerospace & Technologies Corp.
>bfields@xxxxxxxx
>(303) 939-4036
>
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