Saprasad- I have no idea on exactly how your silicon parts will behave in your system at temperature since the details will depend on your timing margins, the corner conditions and many, many other circuit details. However I just wanted to say that I really doubt that the PCB traces operating at 70 deg. C are a significant contributing factor to your system failure. Direct your investigations towards the timing margins and other factors associated with your active devices. The silicon parameters will have many orders of magnitude greater variation with temperature compared to any variations contributed by the passive transmission lines on the PCB. The transmission line parameters (RLG&C) will vary a bit with respect to temperature. I'd expect the copper losses in the transmission lines (R) to vary the most over temperature. Copper has a positive temp coefficient of resistance of about 3.9e-3/deg C. So the resistance of a line will increase about 18% over the value at 25 deg C when heated to 70 deg C. Dielectric losses in Neclco 4000-13 (for example) below 2.5 GHz are relatively constant from 25 to 70 deg C. as is the dielectric constant. At higher (5-20 GHz) you may see a bit more variability wrt temperature. Whether any of these changes are significant in your application you will need to determine, but I'd suspect they will be pretty insignificant compared to silicon variability over temp. See an article by some authors Sheets and D'Ambrosia at Agere and Tyco entitled "Evaluating Environmental Impacts on Channel Performance" for a more in depth discussion: http://www.commsdesign.com/design_center/netprocessing/design_corner/showArticle.jhtml?articleID=20300581 -Ray saprasad wrote: >Hi All, >Here is the details of problem we are facing: > >We have developed the GP7000 Main Board V1.0 which is running at 258 MHz, >while the version 1.2 developed at production site is running at 250 MHz at >normal temperature. > >Client is testing the board at 65 deg chamber temperature. At this temperature >the board stops working because the temperature at CPU will be near to 70 deg. >Please note that the CPU and Memory are commercial grade. As per client's past >experience, other products are running above 70 deg temp at 200 MHz. > >Is it possible to know what will happen to the CPU-Memory interface running at >250MHz at 70 deg ? >The failure is due to component operating temperature range or due to some >synchronization loss between Memory and CPU? >What will be the behavior (impedance, rise time, fall time effect) of tracks >at 70 deg ? > >We have track length of 4 inch between CPU(S3C2410) and Memory(HY57V561620B). >Whether this is playing any role at higher temperature? > >Please advise us if you have any suggestions to sort out this problem. > >Regards, >Prasad > > . ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu