[SI-LIST] Re: Strange Gnd Clamp V-I curve when generating IBIS
- From: "Tom Dagostino" <tom@xxxxxxxxxxxxx>
- To: <a.ingraham@xxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 17 Dec 2004 11:53:33 -0800
If the current is leakage current one should not trust a design on it. If
there are dedicated pullups or pulldowns then they should be included in the
model.
Dedicated pullups or pulldowns do not supply leakage currents, they are
pullups or pulldowns. Leakage currents are parasitic currents that flow
because of non-ideal behavior. Pullups and pulldowns are designed to have a
specific affect on the circuit.
With leakage currents 20 different parts will get you at least 20 different
answers. Some parts will have leakage to the ground terminal, some will
have leakage to the supply terminal. And in most cases there will be paths
to both. You will not be guaranteed that it will be flowing in or out of the
device. It is not specified, it is not quantified. It is not something to
base a design or any analysis on.
So, with that said. Are you willing to go to a customer, in front of your
boss and tell the customer that the unit that failed was designed to count
on leakage currents?
Tom Dagostino
Teraspeed Consulting Group LLC
503-430-1065
tom@xxxxxxxxxxxxx
www.teraspeed.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Andrew Ingraham
Sent: Friday, December 17, 2004 10:53 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Strange Gnd Clamp V-I curve when generating IBIS
> ... However, there are some folks out there who may
> be interested in how the bus floats, i.e. what will the
> voltage on a bus be when all buffers are in the high impedance
> state. In this case even these small currents become important.
> Would you really trust that?
Under suitable conditions, yes!
If a bus is supposed to float a certain way, say because one of the devices
has weak pull-ups in it, then these "leakage" currents probably are in the
high uA to low mA range. I probably can depend on that, as much as I could
on a 5k pull-up resistor.
For many digital circuits, leakage in the nA range would be in the noise and
can't be counted on to consistently pull the bus a certain way. But it's
not inconceivable. You just need to know where and what all your current
paths are. Many analog folks are OK with currents in the pA's.
Muranyi makes a good point, as I was hinting at, that the model creator
shouldn't second-guess his customers by assuming they don't care about
such low currents.
With an IBIS model, zeroing the leakage currents or truncating the tables
between GND and VCC, sends a message to the model user that the device
is really this ideal or perfect. If anything, it might have been better to
load up the tables with the worst-case data sheet values (say, +10 uA in the
max column and -10 uA in the min column), even if the SPICE model behavior
is much smaller.
Regards,
Andy
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