[SI-LIST] Re: Stackups with Microvias
- From: "Chris McGrath" <chris.mcgrath@xxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 17 Feb 2005 12:04:50 -0500
One thought I had was to breakout to buried vias on layer 2 (originally
proposed as a power layer, the core power layer to be specific) so that
all core power and ground did not need buried/blind vias in the core of
the board. In other words, the microvias would go down to layer 2
(commonly done and manufacturable) and then the buried via breakout
would be on this power plane with the distance between the signal and
the power plane being the size of the anti-pad. It has the benefit of
only requiring buried vias for signals and non-core power. This has
been done by our layout guys before, but I'm interested in hearing
opinions on this approach. =20
Thanks!
Chris
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx=20
> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Peterson,=20
> James F (FL51)
> Sent: Thursday, February 17, 2005 7:22 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Stackups with Microvias
>=20
>=20
> Chris -
>=20
> I agree with Bob, layers 2 and 11 have to be signal layers=20
> for reasons he describes below. Remember that a micro via,=20
> because of aspect ratio limitations, can't penetrate more=20
> than 1, maybe 2, layers.=20
>=20
> here's a quick thought on a 12 layer stackup (no allowance=20
> for any core power here).
>=20
> 1 - breakout/gnd
> 2 - uvia layer (you can route signals on this layer also)
> 3 - G
> 4 - Sig
> 5 - Sig
> 6 - IO power
> 7 - Ground
> 8 - Sig
> 9 - Sig
> 10 - Ground
> 11 - uvia layer (you can route signals on this layer also)
> 12 - Breakout/Ground
>=20
> regards,
> Jim Peterson
> Honeywell
>=20
>=20
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx=20
> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of=20
> rsefton@xxxxxxxxxxxxx
> Sent: Wednesday, February 16, 2005 6:42 PM
> To: si-list@xxxxxxxxxxxxx; 'Chris McGrath'
> Subject: [SI-LIST] Re: Stackups with Microvias
>=20
> =3D0D =3D0D
> Chris -
>=20
> Layer 2 would typically be a signal layer for this. You=20
> microvia down to la=3D yer 2 and break out from there where you=20
> don't have to contend with the BGA=3D pads. On layer layer 2=20
> you just have to route around the microvia (si=3D gnal) pads=20
> and through-hole via (power & ground) anti-pads.=3D0D=20
>=20
> Bob S.
>=20
> On Wed Feb 16 15:05 , "Chris McGrath" sent:
>=20
> =3D0D
> When designing a microvia breakout (microvia from surface to=20
> layer immediately below it), is it still preferable to have a=20
> ground layer on layer 2 or can it be a power layer? Can=20
> anybody offer some advice about microvia breakout as it=20
> relates to stackup assuming that the surface layer is flooded=20
> with ground except for thru-holes and component pads?
>=20
> My thinking was (for an example twelve layer stackup):
>=20
> 1 - Breakout/Ground
> 2 - Power1
> 3 - Ground
> 4 - Sig
> 5 - Sig
> 6 - Ground
> 7 - Ground
> 8 - Sig
> 9 - Sig
> 10 - Ground
> 11 - Power2
> 12 - Breakout/Ground
>=20
> I'm wide open to suggestions. Our board will probably be=20
> 20-24 layers, but this is just an example that mainly=20
> pertains to the question of microvia breakout.
>=20
> Thanks,
> Chris
>=20
>=20
> ------------------------------------------
> Chris McGrath
> Sr. Hardware Engineer
> ADIC
> ph: (607) 241-4858
> eM: chris.mcgrath@xxxxxxxx[1]
> ------------------------------------------
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