[SI-LIST] Sr. Signal Integrity Engineer Position Available @ Sun Microsystems, Inc.
- From: Derek Tsai <derek.tsai@xxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 15 Oct 2007 22:19:05 -0700
Folks,
We have a challenging Sr. Signal Integrity Engineer position available now.
You will be working directly with the top-notch engineers within the
fast-pace
x64 Systems Group that created Sun's exciting, award-winning x64 product
lines.
You will also be collaborating with the top signal integrity engineers of
Sun's strategic partners - Intel, AMD and others, to design the
next-generation
cutting-edge blade/rack-mount servers.
Please check out and apply at:
http://www.sun.com/corp_emp/search.cgi?req=556242[1]
Derek Tsai,
Manager, x64 Systems
Sun Microsystems, Inc.
=====================================================
ESSENTIAL FUNCTIONS:
Works with the board designers to arrive at an optimal set of boardrouting
and design rules to ensure optimal noise and timing marginfor
manufacturability of the hardware products. Prior to board layout,evaluate
the various design parameters including I/O timing
budget,number/type/placement of decoupling capacitors, routing topologyusing
SPICE/SiSoft simulator or based on measurements on test vehicles.
As part of the validation process, perform post-layout verification of the
signal and power planes on the board using verification tools such
asSpecctraQuest or SiSoft.
All of the signal integrity work strives to meet the aggressive,
leading-edgesystem performance and reliability. Must understand the system
design trade-offs. PLL application experience is a plus.
MARGINAL FUNCTIONS:
* Project management
* Meeting coordination
REQUIRED KNOWLEDGE:
* Solid electronic circuit background
* Good electromagnetic (EM) or EMI knowledge
* In depth knowledge of high-speed design, transmission-line
theoryfield-solving methods, noise analysis and EMC techniques
* Expert in building models from transistor level and conversion to
behavioral models (IBIS or SPICE) for use in full system level simulation
* Experience with SPICE or other 'analog' simulators.
* Experience with measurement equipment such as oscilloscope,impedance
analyzer, and network analyzer.
* Experience in correlating measurements to simulation models.
* Some experience with the board design tools such as Allegro or
* BoardStation
* Good communication/presentation skill
This position may vary between a MTS4, HW, Staff Eng, HW or Sr. Staff Eng,
HW(Z-09, Z-10 or Z-12) depending on the experience of the candidate.
PREFERRED KNOWLEDGE:
* EMI knowledge
* Practical experience capturing routing rules directly into Constraint
Manager
* Project management
* Presentation
* Solaris/Linux
YEARS OF EXPERIENCE:
9+
MINIMUM LEVEL OF EDUCATION:
MS, PhD
FIELD OF STUDY:
EE
LOCATION: Menlo Park, CA
--- Links ---
1 http://www.sun.com/corp_emp/search.cgi?req=556242
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