[SI-LIST] Signal integrity openings in 3PAR Inc
- From: Chris Cheng <Chris.Cheng@xxxxxxxx>
- To: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 19 Jan 2010 13:52:45 -0800
3PAR Inc currently has two signal integrity engineer openings:
You can apply online at
http://3par.submit4jobs.com/index.cfm?fuseaction=83064.apply&CID=83064&JID=0
Or forward me your resume before the end of this week.
Chris
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Senior staff signal integrity engineer
Primary responsibilities include:
* Responsible for developing channel analysis methodology for multgiga bit
serial buses
* Lab characterization of test structures and correlation with simulations
* Jitter characterization and decomposition
* Interface with CAD tool vendors to implement channel analysis methodology
* Assist in bring up and characterization of ASIC SerDes
JOB REQUIREMENTS
* BSEE required, MS or PhD EE preferred
* 10+ years in hands on signal integrity analysis and testing
* Knowledge of tools such as SPICE or Verilog-A/AMS , Matlab or Perl
scripts, CST MWS or HFSS 3D field solver
* Prior experience in SerDes measurements and modeling
* Knowledge of network analyzer calibration and de-embedding techniques
* Knowledge of peak distortion and/or statistical channel analysis methods
* Knowledge of jitter decomposition techniques
* Experience with Stateye or other channel analysis tools
* Knowledge of PLL jitter and loop dynamics
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Primary responsibilities include the following:
* Generate PCB signal integrity routing rules and creat constrain files
* Perform post route design rules checks
* Develop electrical verification test (EVT) test plans and software
* Perform EVT on first system arrival
* Using 3D EM tools to generate PCB parasitics structures to understand
design trade offs
* Assist in SPICE analysis of ASIC DDR3 memory bus
* Assist in ASIC package design and generate package interconnect and SSO
models
JOB REQUIREMENTS
* BSEE required, MSEE preferred
* Knowledge of tools such as SPICE or Verilog-A/AMS , Matlab or Perl
scripts, CST MWS or HFSS 3D field solver
* Knowledge of Allegro PCB tool
* Knowledge lab testing equipments such as Oscilloscope, high speed probes
* Knowledge of Sigrity PowerSI tool
* Knowledge of Allegro Constrain manager
* 3+ years in hands on signal integrity analysis and testing
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