[SI-LIST] Re: SPICE vs IBIS
- From: Scott McMorrow <scott@xxxxxxxxxxxxxxxx>
- To: lgreen@xxxxxxxxxxx
- Date: Tue, 28 Aug 2001 16:14:36 -0700
At 600 MHz operation, we are talking bit rates of 1.2 Gbps, with
3rd and 5th harmonics of 1.8 and 3 GHz. To support the bandwidth
necessary for this signal requires an edge rate of 120ps. If we
accept 20% of the edge rate as being the critical modeling length
necessary for most digital signalling, then we need to model sections down
to at least a 25ps accuracy or better. This gives us a final accuracy
of about 5%. If our model section accuracy as better than 10% (12ps),
then the final simulation accuracy is good to within 2%.
At this point, there are several issues.
Is the modeling of the I/O cell accurate enough for >3GHz simulation
bandwidth? It is quite tricky to use IBIS to model to this accuracy,
but not impossible. It is more likely that a Spice model will be
accurate at this frequency. In either case, as Lynne points out,
the model must be validated against measured or expected results.
Does the modeling of the I/O cell account for power and ground
noise? In IBIS, this can be performed as a worst case exercise,
where the power and ground rail is colapsed and the behavior of
the buffer is extracted at this condition. However, the dynamic
effects of power and ground noise on the I/O cell (i.e. output
modulation) cannot be adequately simulated using IBIS models.
This has a drastic effect on the jitter performance of a driver.
If a bank of I/O cells use unbalanced coding, resulting in large
power and ground noise at the die, Spice is the more appropriate
way to model these effects. If a balanced coding technique is
used (i.e. differential signalling, for instance), then IBIS modeling
may be accurate enough.
Is the package modeled with sufficient accuracy to support 3Ghz
of simulation bandwidth? Most IBIS models are not sufficient for
this purpose. In a very few cases, package models are supplied which
utilize multiple sections for more accurate simulation at higher
bandwidths. Even then, package signal to signal and signal to
power/ground coupling is not modeled. This is a serious detriment
to high bandwidth simulations. Most Spice package models are
also not developed with sufficient bandwidth to accurately simulate
all effects at this frequency. At these frequencies, it is necessary to
model all packaging effects including:
redistribution layer characteristics
bondpad capacitance
wirebond distributed L,R,C (yes, wirebonds do have capacitance)
package trace distributed L,R,C
plating tail distributed L,R,C
via L,R,C
Ball L,R,C
power/ground plane void areas
Mutual capacitive and inductive coupling between all elements.
PCB ball mounting pad capacitance
In the end, there is no one answer to what can be used to successfully
simulate systems at 600 MHz. A good engineer will evaluate all elements
of the simulation and modeling chain to determine what is necessary to
achieve the time and amplitude accuracy required. Usually this will
mean questioning all data along the way, unless accompanied by
sufficient measurement correlation reports.
regards,
scott
--
Scott McMorrow
Principal Engineer
SiQual, Signal Quality Engineering
18735 SW Boones Ferry Road
Tualatin, OR 97062-3090
(503) 885-1231
http://www.siqual.com
Lynne Green wrote:
> Lots of articles published on this one! They all agree on a
> few common points (but disagree on others).
>
> Basically, use the models your vendors will stand behind.
> If they have validated the models at 600 MHz, then use them.
> If they haven't validated their model, whether they are SPICE
> or IBIS, be careful. IBIS can be as (or more) accurate if the
> models are made and used correctly.
>
> Use SPICE if you can afford the simulation time, and the models
> are trustworthy. SPICE is needed if you want to do Monte Carlo
> statistics or use analog components (such as PLLs).
>
> Use IBIS if you need results quickly, and the models are
> trustworthy. IBIS allows quick checking of min/typ/max signal
> characteristics. Most signal integrity simulators are optimized
> around IBIS models, for constraint checking, as well as for fast
> simulation.
>
> - Lynne
> lgreen@xxxxxxxxxxx
>
> From: "Viral" <viral@xxxxxxxxxxxxxxx>
> Subject: [SI-LIST] SPICE vs IBIS
> Date: Tue, 28 Aug 2001 09:16:59 +0530
> Hello!! All,
> I am new to the field of PCB designing and SI analysis.
> I would like to know the difference between SPICE model and IBIS models.
> I have to perform SI analysis for signals of order of 600 MHz.
> So I would like to know more about the models and which should be preferred
> and why.
> Thanking You,
> Regards,
> Viral
> Viral S. Shah
> Paxonet Communications India Pvt. Ltd.
> www.paxonet.com
>
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