[SI-LIST] SI Engineer opening in Minneapolis area

We are currently looking for a Signal Integrity Engineer to work on hig=
h
performance computer design in the Minneapolis area.  We are a small gr=
oup
within a very large company. (General Dynamics)  There will be extensiv=
e
work on multi-Gbit differential signalling.  If interested, please see
below:


Job Description:

An experienced signal integrity engineer is being sought for the design=
 and
analysis of interconnects for multi-Gbit differential signaling in very=

large, high performance computers.  The successful candidate will
participate in the definition of chip packages, printed circuit boards,=
 and
system interconnects. The individual will give technical direction to
package and board designers. The tasks will include modeling system
components and simulation of signal transmission paths.  In addition, t=
his
engineer will help design the clocking, power distribution, and low vol=
tage
DC decoupling. Within a concurrent engineering environment, the individ=
ual
will be part of a team with system architects, logic designers, ASIC
engineers, and packaging engineers in the creation of leading edge syst=
ems.

Requirements:

Candidate must have a minimum of a BSEE with 5+ years of relevant
experience in the following signal integrity tasks:
   =B7  In-depth knowledge of transmission line theory, clock distribut=
ion
      issues, and power distribution analysis.
   =B7  Knowledge of transistor level, deep sub-micron CMOS circuit des=
ign
      for high-speed IOs.
   =B7  Knowledge of modeling techniques for interconnect components.
   =B7  Extensive use of HSPICE to simulate signal integrity, including=
 use
      of the w-element lossy transmission line model or equivalent
      simulation techniques.
   =B7  Experience in defining impedance controlled printed wiring boar=
d
      stack-ups and familiarity with board fabrication processes.
   =B7  Knowledge of both time and frequency domain analysis and measur=
ement
      techniques.
   =B7  Experience with standard cell ASIC design and on-chip signal
      integrity issues a plus.

Candidate shall have strong communications skills and desire to functio=
n in
a dynamic development environment where alternative concepts and
technologies are routinely explored. UNIQUE: Applicants selected will b=
e
subject to a government security investigation and must meet eligibilit=
y
requirements for access to classified information. U.S. Citizenship is
required.

If interested please respond directly to me at Chris.Simon@xxxxxxxxxx

Website http://www.gd-ais.com/=


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