Dear Madam/Sir, My name is Nallu Madhu K. I am a graduate student at University of Missouri Rolla, in the department of Electrical and Computer Engineering, planning to graduate with M.S. in Computer Engineering in August2002. I am looking for a full time job opportunity. I request you to consider my resume (which is at the end of this mail) as an application for suitable job opening in the Signal Integrity area. I completed courses in Digital Design, VLSI, and VHDL in which I have worked extensively on the Mentor Tools like Leonardo Spectrum, Modelsim, Accusim, IC Station and have excellent hands on experience with the projects formed a part of the curriculum. My other strong areas include advanced computer architecture, especially with the memory and cache architecture for various processors and their timing analysis, which I have learnt as a part of the courses (AdvancedComputer Architecture and Microprocessor System Design), Electromagnetic Compatibility concepts as Grounding and Shielding, High SpeedDigital Design, and Signal Integrity (using the Spectrum Analyzer, Oscilloscope to measure the CrossTalk of transmission lines, cables, measure their capacitance and inductance etc). As a part of my graduate research workunder the supervision of Dr. Wu, I worked on creating a new technology ofcomputation without transistors, (using the atoms in materials to create basic combinational logic block like gates, half and full adder, which could be used as a basic building blocks for large computational networks). This method of computation increases the computation speed by about 6 fold when compared to the normal CMOS/transistor logic speed. I completed 3 internshipsas an Undergraduate student in India in internationally well-knowncompanies like Electronic Corporation of India Limited, Electronic Test and Development Center, National Geophysical Research Institute. If youneed any further information I can be reached at (573)647-2702 or by emailat nallu@xxxxxxx[1]. Thank you very much for your time to review my resume. Waiting for your response. Sincerely, Madhu K Nallu ----------------------------------------Nallu Resume--------------------------------------- MADHU K NALLU 1300 North Oak Street, Apt#2 Rolla, MO-65401 Ph: (573)-647-2702 E-mail: nallu@xxxxxxx[2] OBJECTIVE Seeking a full-time position as a Signal Integrity Engineer. EDUCATION *University of Missouri-Rolla (UMR) nbspAug 2000- Aug 02 M.S. in Computer Engineering GPA: 3.00/4.00 *CBIT, Osmania University, India Oct 96- May 00 BR B.S. in Electrical &Electronics Engineering GPA: 3.80/4.00 RELEVANT COURSES Signal Integrity, High Speed Digital Design, Grounding and Shielding (EMC), Advanced Electromagnetism, Digital Logic, Digital SystemModeling (VHDL), VLSI Design, Advanced Computer Architecture EXPERIENCE *Graduate Research Assistant Aug 01- Present Department of Electrical and Computer Engineering, UMR Designed and analyzed a 2 x 2 BOX of Quantum Resistor Networks for Parallel Electron Wave Computing. *Graduate Research Assistant nb Aug 00 - Aug 01 Center for Infrastructure Engineering Studies, UMR Performed support and maintenance on UNIX, Novell and Windows NT computers. Install, configure and network administer a campus-wide local area network. *Project Trainee and Intern Aug 99 - Dec 99 Electronic Corporation of India Limited, (Govt., of India), India Part of 6-member team to design and simulate Intel?s 8259A PPI chip using Verilog. PROJECTS *Laboratory Experience. Performed laboratory experiments to establish a relationship between time and frequency domain representations of digital pulse train using oscilloscope and spectrum analyzer. *Modeling real time transmission line discontinuities in Hyperlynx and eliminating the effects of the same. *Designed, built, measured and analyzed the behavior of low pass filters at high frequency. *Microprocessor Design. Designed and tested a synthesizable VHDL model of a 16-bit Microprocessor with a 128X24 bit Program memory, 128X4 bit Data memoryand a 24- bit instruction. *Mu-law Codec. Designed, simulated, synthesized a 14 bit mu-law codec for speech compression using VHDL and performed timing analysis of the model. Design was set to fit in Actel 1010B PLCC 44 chip. ACTIVITIES &HONORS Member: International Students Club, UMR. Toastmasters International, University Orators Club, UMR. Member IEEE. UMR. Vice-President. CBIT, Osmania University, India. Student Body President: Little Flower Junior College, Hyderabad, India COMPUTER SKILLS EDA Tools: Mentor Graphic?s Design Architect, Modelsim, Accusim, Leonardo Synthesizer, Actel?s Designer, Hyperlynx. HDL?s/Languages/Assembly: VHDL, Verilog, C, C++, HTML, Forth, Intel 8085 &8086, TMS320C25X, SQL, PL/SQL, UML Operating Systems/Packages: Windows NT/2000/XP, Sun Solaris, MS-DOS, Matlab,P-spice. Database Technologies: Access 2000, SQL Server 2000, Oracle 7.3, SQL Plus Project Management Tools: MS Office, MS Project VISA STATUS F-1 (Student Visa) ---------------------------------------------------------------------------- Send and receive Hotmail on your mobile device: Click Here[3] --- Links --- 1 mailto:nallu@xxxxxxx 2 mailto:nallu@xxxxxxx 3 'http://g.msn.com/1HM1ENUS/c152??PI=44364' ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu