[SI-LIST] Re: Reference Plane

  • From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
  • To: <leeritchey@xxxxxxxxxxxxx>, "Zhangkun" <zhang_kun@xxxxxxxxxx>
  • Date: Mon, 8 Sep 2003 11:33:04 -0700

Hi Lee,
The problem appears to be how we're interpreting the original question.  =
As I understood it, the issue being raised is the effect of a trace =
transitioning between different reference planes, which is a different =
issue than coupling of power supply noise onto that trace.

I contend that the issue of transitions between reference planes may or =
may not be adequately addressed by the typical power-delivery subsystem. =
 Providing a proper path for return current is a different (but possibly =
overlapping) issue than keeping noise off VCC.  I think Ray Anderson did =
a great job of articulating the difference between the two in an earlier =
posting.

I've posted my thoughts (based on theory, measurements, and experience) =
on this contention earlier, and they should be available on the =
archives.  If you have issues with those, please let me know.

Jeff Loyer

-----Original Message-----
From: Lee Ritchey [mailto:leeritchey@xxxxxxxxxxxxx]
Sent: Monday, September 08, 2003 10:57 AM
To: Loyer, Jeff; Zhangkun
Cc: si-list
Subject: [SI-LIST] Re: Reference Plane


Jeff,

I am aware there has been lots of discussion and that's just what it is. =

There is also plenty of science that supports my statements.  It is true
that whatever ripple there is on Vcc or Vdd will couple onto any signal
that runs over that plane.  Nothing wrong with that as long as the =
ripple
voltage is within limits.  This condition is satisfied by doing a good =
job
of designing the power supply system.  I've designed hundreds of
supercomputer PCBs just this way.  Does Cray Research ring a bell?  How
about Amdahl?

Lee


> [Original Message]
> From: Loyer, Jeff <jeff.loyer@xxxxxxxxx>
> To: Zhangkun <zhang_kun@xxxxxxxxxx>
> Cc: <leeritchey@xxxxxxxxxxxxx>; si-list <si-list@xxxxxxxxxxxxx>
> Date: 9/8/2003 8:53:20 AM
> Subject: [SI-LIST] Re: Reference Plane
>
> Eeks!  I would not agree with Lee's statement.  There has been a LOT =
of =3D
> discussion on this issue, and I would strongly suggest you work to =3D
> understand the issues as they can have considerable impact.
>
> Searching through the archives for "reference plane" should give you =
=3D
> tons of information on the subject.
>
> Jeff Loyer
>
> -----Original Message-----
> From: Lee Ritchey [mailto:leeritchey@xxxxxxxxxxxxx]
> Sent: Monday, September 08, 2003 8:08 AM
> To: Zhangkun; si-list
> Subject: [SI-LIST] Re: Reference Plane
>
>
> Zhangkun,
>
> If  you have designed your power subsystem correctly, the Vcc and =
ground
> planes of you power supply will be tied to each other through less =
than =3D
> 10
> milliohms at all of the frequencies that are in you signal, so you =
don't
> haveto worry about a disconnect.
>
> Lee
>
>
> > [Original Message]
> > From: Zhangkun <zhang_kun@xxxxxxxxxx>
> > To: si-list <si-list@xxxxxxxxxxxxx>
> > Date: 9/8/2003 9:50:26 PM
> > Subject: [SI-LIST] Reference Plane
> >
> > Dear All:
> > There are one driver and one receiver, which is connected by one =3D
> trace.
> The driver and receiver use GND as their reference. The trace use VCC =
as
> its reference plane. As shown in power integrity, there is impedance
> between power and ground. Therefore, there are one disconnection at =
the
> driver and one disconnection at the receiver. Would these two =3D
> disconnection
> disgrade signal integrity?
> >
> > Best Regards
> >
> > Zhangkun
> > 2003.09.08
> >
> >
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