[SI-LIST] Re: Quick switch
- From: "Mikhail Matusov" <matusov@xxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Fri, 30 May 2008 10:50:30 -0400
Jim,
I don't think you can without designing a much bigger circuit around the
switch. Unless you simply disable the clock(s) before switching... There are
special clock muxes designed to guarantee glitch-less operation though.
=======================
Mikhail Matusov
Senior Hardware Design Engineer
Square Peg Communications
Tel.: +1 (613) 271-0044 ext.231
Fax: +1 (613) 271-3007
http://www.squarepeg.ca
----- Original Message -----
From: "Peterson, James F (EHCOE)" <james.f.peterson@xxxxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Friday, May 30, 2008 10:03 AM
Subject: [SI-LIST] Re: Quick switch
> This is a little off the SI topic related to these FET switches, but I
> would also want to understand how I select one of these clocks, by
> enabling one these switches, without initially causing a sliver of a
> clock pulse to propagate out to my flops.
>
> Jim Peterson
> Honeywell
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Scott McMorrow
> Sent: Friday, May 30, 2008 9:19 AM
> To: steve weir
> Cc: ravi.potana@xxxxxxxxx; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Quick switch
>
> Ravi
> To follow on with what Steve has said, most FET switch packages do not=20
> have adequate package grounding. Since the substrate is normally=20
> grounded, this poses a problem, since there is parasitic capacitive=20
> coupling between each switch and the substrate. These are fairly easy=20
> devices to model in SPICE, and many manufacturers provide accurate=20
> models. IBIS models, however, cannot adequately model these devices.
>
> regards,
>
> Scott
>
> Scott McMorrow
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
> (401) 284-1827 Business
> (401) 284-1840 Fax
>
> http://www.teraspeed.com
>
> Teraspeed(r) is the registered service mark of
> Teraspeed Consulting Group LLC
>
>
>
> steve weir wrote:
>> An NFET or CMOS switch in a package has parasitics like any other=20
>> device. If you model and work within the limitations of those=20
>> parasitics you shouldn't have any unwelcome surprises. If you pretend
>
>> that the device is without parasitics you can easily make designs that
>
>> run into problems.
>>
>> Steve
>> ravi.potana@xxxxxxxxx wrote:
>> =20
>>> Hello All,
>>> =20
>>> Please let me know if anyone has used Quick switch (FET based) on
> clock
>>> with frequency 125MHz for muxing operations and seeing any SI issues
> on
>>> the clock line after passing through the FET Switch.=20
>>> =20
>>> regards
>>> Ravi
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