[SI-LIST] PCIe failure due to too fast of an edge?
- From: "Tom Zych" <Tom_Zych@xxxxxxxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 19 Aug 2008 12:17:25 -0400
Hi all. I'm hoping someone can help me in gathering information for some
research I'm doing.
The PCIe Gen 2 spec includes a minimum risetime spec that, for 5 GT/s, works
out to 30 ps. My question is, has anyone actually ever seen a device fail
this spec? If you have, I'd be interested in knowing the characteristics of
the measurement instrument (e.g. bandwidth, sample rate, etc.) as well as
details of the conduction path (e.g. probe with X BW, SMA cable from a test
fixture, connector torqueing, etc.) that you were using when you made the
measurement.
If you want to respond directly to me via email, I can ensure that your
name/your company's name will not be released.
Thanks,
Tom
______________________________
Tom Zych
Chief Engineer
ASA Corp
phone: +1-413-596-5354
FAX: +1-413-596-9686
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