Posts for si-list, 08-2008

Browse: Last Month: 07-2008 Main Archive Page Next Month: 09-2008

» [SI-LIST] Re: Multiple voltages clearance/seperation in a single plane -
» [SI-LIST] Multiple voltages clearance/seperation in a single plane -
» [SI-LIST] Re: IBIS generation methodology of v3.2 Vs v4.2 -
» [SI-LIST] Re: IBIS generation methodology of v3.2 Vs v4.2 -
» [SI-LIST] Re: Glitch -
» [SI-LIST] Re: Linked-In Signal Integrity Engineering Group -
» [SI-LIST] Re: Linked-In Signal Integrity Engineering Group -
» [SI-LIST] Glitch -
» [SI-LIST] Re: IBIS generation methodology of v3.2 Vs v4.2 -
» [SI-LIST] IBIS generation methodology of v3.2 Vs v4.2 -
» [SI-LIST] Re: VHDL-AMS -
» [SI-LIST] Re: VHDL-AMS -
» [SI-LIST] Re: VHDL-AMS -
» [SI-LIST] VHDL-AMS -
» [SI-LIST] Linked-In Signal Integrity Engineering Group -
» [SI-LIST] TL paramters conversion from EBD to ADS -
» [SI-LIST] Re: Ringing in Return Loss data -
» [SI-LIST] Re: Ringing in Return Loss data -
» [SI-LIST] Re: Ringing in Return Loss data -
» [SI-LIST] Asian IBIS Summit (Japan) Second Announcement -
» [SI-LIST] Re: Ringing in Return Loss data -
» [SI-LIST] Re: Ringing in Return Loss data -
» [SI-LIST] Re: Embedded elements in PCBs -
» [SI-LIST] Embedded elements in PCBs -
» [SI-LIST] Re: Ringing in Return Loss data -
» [SI-LIST] Re: Ringing in Return Loss data -
» [SI-LIST] Re: Ringing in Return Loss data -
» [SI-LIST] Ringing in Return Loss data -
» [SI-LIST] Re: Current sense resistors and power integrity -
» [SI-LIST] Re: Current sense resistors and power integrity -
» [SI-LIST] Re: Current sense resistors and power integrity -
» [SI-LIST] Re: Current sense resistors and power integrity -
» [SI-LIST] Re: Current sense resistors and power integrity -
» [SI-LIST] Re: Current sense resistors and power integrity -
» [SI-LIST] Re: Current sense resistors and power integrity -
» [SI-LIST] Current sense resistors and power integrity -
» [SI-LIST] Asian IBIS Summit (China) Second Announcement -
» [SI-LIST] Are there any companies doing token-based (or time-based) licensing of the Ansoft tools? -
» [SI-LIST] Re: What if DDR termination power Vtt cannot sink current. -
» [SI-LIST] Re: What if DDR termination power Vtt cannot sink current. -
» [SI-LIST] What if DDR termination power Vtt cannot sink current. -
» [SI-LIST] HyperLynx vs XTK -
» [SI-LIST] Signal Integrity related position at Sierra Video Systems. Possible recent grad. -
» [SI-LIST] Hirose Electric -- SI opening in Cupertino, CA -
» [SI-LIST] Looking for a mid level RF engineer to join Western Digital Corporation in San Jose, California. -
» [SI-LIST] PCIe failure due to too fast of an edge? -
» [SI-LIST] 2-day IBIS Seminar -
» [SI-LIST] Ansoft Q2D -
» [SI-LIST] Free Agilent seminar "Tackling High-Speed Serial Designs" US and Canada Sept 16th to Oct 17th -
» [SI-LIST] Voice your opinion about the Cadence bid -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Asian IBIS Summit (Japan) First Announcement -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: S-Parameter for SI Training -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: S-Parameter for SI Training -
» [SI-LIST] Re: Maximum Current Density for Copper Plane -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: S-Parameter for SI Training -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] S-Parameter for SI Training -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] Re: min/max trace length -
» [SI-LIST] min/max trace length -
» [SI-LIST] Re: Maximum Current Density for Copper Plane -
» [SI-LIST] Re: Maximum Current Density for Copper Plane -
» [SI-LIST] Maximum Current Density for Copper Plane -
» [SI-LIST] Re: Serial killers -
» [SI-LIST] CDNLive! Silicon Valley 2008 - It's not too late to take advantage of early registration -
» [SI-LIST] Serial killers -
» [SI-LIST] Re: Compact source -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] SPICE FOR SWITCHING TRANSFORMER -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] SI tool update -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: Single-ended to Diff. S parameter tool -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Single-ended to Diff. S parameter tool -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] PCB Corners - Need help finding research paper -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Asian IBIS Summit (China) First Announcement -
» [SI-LIST] Realistic ddr3 routing length -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] [RE] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: Compact source -
» [SI-LIST] Re: Compact source -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Compact source -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] Re: PCB extractor to obtain S parameters -
» [SI-LIST] PCB extractor to obtain S parameters -
» [SI-LIST] Re: Please complete this one-question, one-minute survey on compute power for signal integrity simulations. -
» [SI-LIST] Signal Integrity position at Juniper Networks -
» [SI-LIST] Please complete this one-question, one-minute survey on compute power for signal integrity simulations. -
» [SI-LIST] Sr. Hardware Systems Design opening at Apple -- SI expertise preferred -
» [SI-LIST] Re: 2 layers PCB with no Plane(gnd or Power) -
» [SI-LIST] Re: 2 layers PCB with no Plane(gnd or Power) -
» [SI-LIST] Re: R: 2 layers PCB with no Plane(gnd or Power) -
» [SI-LIST] R: 2 layers PCB with no Plane(gnd or Power) -
» [SI-LIST] Re: Thermal analysis -
» [SI-LIST] Re: Thermal analysis -
» [SI-LIST] Re: 2 layers PCB with no Plane(gnd or Power) -
» [SI-LIST] Re: 2 layers PCB with no Plane(gnd or Power) -
» [SI-LIST] 2 layers PCB with no Plane(gnd or Power) -
» [SI-LIST] Thermal analysis -
» [SI-LIST] Re: 12 Layer stack -
» [SI-LIST] Re: 12 Layer stack -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedance -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] Best book on Ethernet PHY? -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] LVDS reciever hysteresis according to IEEE and TIA-EIA -
» [SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence -
» [SI-LIST] A question about how fast the step pulse we need in measuring impedence -