Can anybody enlighten me on why one would design multiple Vref inputs for QDR (HSTL) SRAMs? My assumption is that all Vref inputs are fed by a common Vdd/2 source. Most SRAMs have two Vref inputs, and some QDR controllers have up to 8 inputs. thnx AAron ************************************* Aaron Frank, P.Eng. Technical Lead, Systems Engineering SiberCore Technologies voice: 613.271.8100 x388 fax: 613.281.8444 email: aaron@xxxxxxxxxxxxx web: www.sibercore.com ************************************* ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu