[SI-LIST] Re: Lumped capacitance estimation
- From: steve weir <weirsi@xxxxxxxxxx>
- To: Sushil Kumar GUPTA <sushil.gupta@xxxxxx>, a.ingraham@xxxxxxxx
- Date: Fri, 08 Apr 2005 00:39:47 -0700
Sushil, that is a number that is often used, but it is not a hard
number. A simple mnemonic is 1inch / ns. . At 3" and 600ps, you are 5X
out from where that approximation is useful and definitely need to treat
the trace as a transmission line. Before you spend a lot of time making
and running models that may well be invalid, it sounds like you could use a
primer. You can find a lot of good information on the web , but
unfortunately misinformation as well. In your situation I would try and
find a university course, one of the travelling seminars, or at least any
of a growing number of good books on the subject.
Steve,
At 11:32 AM 4/8/2005 +0530, Sushil Kumar GUPTA wrote:
>steve, I have found a document from agilent technology which says that if
>rise time is greater than 6 times of cable propogation delay then It can
>be considered as lumped load. Does this mean that I can consider 1/6*Tr
>delay of cable as lumped load for my approximation. I have provided the
>link of the document also. I am confused with different conclusions. If
>you have any link which can provide detail of Tx line characteristic and
>delay approximation , it would be great.
>
>http://www.ewh.ieee.org/r5/denver/rockymountainemc/archive/2005/Feb/High_Speed.pdf
>
>Thanks
>sushil
>
>
>steve weir wrote:
>
>>Sushil, that capacitance you are trying to model does not exist in a
>>vacuum w/o incremental inductance that oppose the changing currents
>>needed to charge the line.
>>
>>For purposes of argument, assume that the propagation velocity is
>>6"/ns. Every fs of that 600ps rising edge, the wave propagates 0.006
>>mils away from the driver, and does so through an incremental
>>inductance.equivalent to the partial inductance for that bit of the
>>transmission line length. So, while you increase the capacitance of the
>>wire by lengthening it, each incremental bit of capacitance is decoupled
>>more and more from the driver by the inductance along the way. Let us
>>assume the inductance is about 6.8nH / ". Would it make anymore sense
>>for you to ask what the equivalent inductance of the line should be to
>>get the same loaded wave form as your present question concerning the
>>capacitance? Both effects are definitely present and interact with each
>>other. Surely if you break the line into fs long LC stages you can get
>>an accurate representation of the behavior. You might be unhappy with
>>the solution time for a 500,000 stage LC network. Perhaps you can
>>approximate with fewer stages and still get a decent answer.
>>
>>Steve
>>
>>
>>
>>
>>At 04:55 PM 4/7/2005 +0530, Sushil Kumar GUPTA wrote:
>>
>>>Hi Andrew,
>>> Perhaps I couldn't explain the problem in right way.
>>> Suppose you have a transmission line (cable) which is
>>>very long let's say 30ns delay. If we assume cable has no loss then
>>>whatever waveform you apply, you will get FAR-END wave after 30ns delay.
>>>I am assuming both end are perfectly matched.
>>> Now if you cansider the NEAR-END rise/fall time (let's assume
>>>avg value 600ps) , it will not depend on the length of the cable. So my
>>>question is that waht will be the approximate value of capacitive load
>>>at the NEAR-END (this time no cable is used) which will provide the same
>>>rise/fall time achieved with cable.
>>> I can state the problem in a different way also. Let's assume
>>>that IO driver has 600ps rise/fall time with 10pf capacitive load. If I
>>>increase the capacitive load obviously rise/fall time will increase.
>>> The PCB trace has 2.72pf/inch capacitive load. If now I connect cable(
>>>PCB trace) with IO driver, it will see 2.72pf/inch capacitve load. The
>>>driver has 45Ohm dc impedance w.r.t ground. So when driver starts
>>>charging PCB trace, every inch of trace will be charged, but only that
>>>part of PCB trace will impact the rise/fall time which is travelled
>>>during transition time. So how will I know how many inches to be
>>>considered.
>>>Andrew Ingraham wrote:
>>>
>>> >> I need to calculate equivalent lumped capacitance seen by an IO
>>> >>driver which is connected to PCB trace (approx 3 Inches) and then cable.
>>> >>The average rise/fall time is 600ps. I have information about the PCB
>>> >>trace capacitance/inches. Will my assumption be correct if I take
>>> >>PCB-trace length (for lumped-capacitance calculation) which provides
>>> 300ps
>>> >>delay.
>>> >>
>>> >>
>>> >
>>> >For lumped capacitance, just multiply capacitance/length times the length.
>>> >
>>> >The rise/fall time doesn't make any difference as far as equivalent lumped
>>> >capacitance is concerned. However, if the rise/fall time is fast enough,
>>> >you shouldn't be using a lumped capacitance in simulations.
>>> >
>>> >Are you sure your PCB trace delay is only 100ps/inch?
>>> >
>>> >
>>> >
>>> >>What would be the best way to simulate IO driver as far as rise/fall time
>>> >>accuracy is concerned assuming lumped model for Tx line.
>>> >>
>>> >>
>>> >
>>> >For accuracy, best way = abandon the lumped model for the line.
>>> >
>>> >What did you mean by "best way" anyway? If you have an I/O driver
>>> model and
>>> >a transmission line model, just simulate them and look at the results.
>>> >
>>> >Regards,
>>> >Andy
>>> >
>>> >
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