[SI-LIST] Re: In Most of the DDR 3 design there are used Daisy chain routing forAddress bus. Why?

  • From: "Moran, Brian P" <brian.p.moran@xxxxxxxxx>
  • To: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>, "Prakash Mohanraj, TLS-Chennai" <mprakash@xxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 18 Sep 2009 17:42:30 -0600

I assume you are referring to the SDRAM to SDRAM daisy chain or fly-by routing 
on the DDR3 module, as
opposed to the connector routing on the motherboard. There are several 
advantages to this topology on
the module.  One is the fact that the loads are distributed over the length of 
the module, as opposed
to the tree structure in DDR2 where you essentially had all the loads lumped at 
or near the end of the
interconnect, which made for very poor SI.  In addition, in DDR3 the CLK, CTRL, 
and CMD/ADR groups are
routed in parallel following the same daisy chain sequence, and are length 
matched from connector to
each SDRAM, whereas on DDR2 there was a huge mismatch between CTRL & CMD/ADR, 
vs CLK. Althought there
is still a load imbalance between CMD/ADR and CLK on some modules, the common 
topology and length matching
significantly reduces timing skew in the common clock signaling.

These are the main advantages of the DDR3 topology. 


Brian Moran
Signaling Development Group
Client Platforms
Intel Corporation

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Lee Ritchey
Sent: Thursday, September 17, 2009 9:36 AM
To: Prakash Mohanraj, TLS-Chennai; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: In Most of the DDR 3 design there are used Daisy chain 
routing forAddress bus. Why?

Prakash,

If you simulate these two topologies in any good SI tool you will see the
difference in waveform quality vs degree of difficulty in routing the
traces.


> [Original Message]
> From: Prakash Mohanraj, TLS-Chennai <mprakash@xxxxxx>
> To: si-list@xxxxxxxxxxxxx <si-list@xxxxxxxxxxxxx>
> Date: 9/17/2009 10:32:32 AM
> Subject: [SI-LIST] In Most of the DDR 3 design there are used Daisy chain
routing forAddress bus. Why?
>
> Hi ,
>           In Most of the DDR 3 design there are used Daisy chain routing
for Address bus. Why?
>           Is there any advantage between Star topology and Daisy chain
topology?
>
> Thanks & Regards,
> Prakash
>
>
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