[SI-LIST] IBIS packaging models

  • From: Russell Rapport <rrapport@xxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Thu, 31 Jul 2003 15:03:14 -0500

I have a customer request for an IBIS package model for a stacked TSOP 
DRAM. In the past, I have modified each customer's TSOP (single 
unstacked IC) model by essentially doubling the component parasitics, 
creating new model sections for the unique chip select pins, and setting 
the package parasitics to match the final packaging parasitics from the 
original TSOP packaging plus our added parasitics. Is there a way to 
create a standard, standalone package model? Note that in our case, we 
would have one package model which would link to or work with two or 
more instances of an unmodified DRAM model. Could this be used by all 
major IBIS simulators (we use Hyperlynx)? Can anyone supply an example, 
and describe any customer issues with its ease-of-use? Thanks in advance 
for all help.

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