I have a customer request for an IBIS package model for a stacked TSOP DRAM. In the past, I have modified each customer's TSOP (single unstacked IC) model by essentially doubling the component parasitics, creating new model sections for the unique chip select pins, and setting the package parasitics to match the final packaging parasitics from the original TSOP packaging plus our added parasitics. Is there a way to create a standard, standalone package model? Note that in our case, we would have one package model which would link to or work with two or more instances of an unmodified DRAM model. Could this be used by all major IBIS simulators (we use Hyperlynx)? Can anyone supply an example, and describe any customer issues with its ease-of-use? Thanks in advance for all help. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu