[SI-LIST] How to calculate/obtain footprint ind/cap characteristic for 402, 603, etc?
- From: "tom_cip_11551" <tom_cip_11551@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 05 Jun 2008 21:32:20 -0000
Hi,
I am trying to determine an optimum decoupling strategy. I have found
lots of manufacturers data conerning capacitor models, from Murata and
others. But I keep thinking that these models can't possibly take into
consideration the layout footprint, because of process, material and
other variations, like the layer height above copper.
So, when attempting to model a capacitor in spice or other, what is a
good strategy in trying to take into consideration the footprint itself?
Yes, I do realize that in some cases, a 3D model can be created, but
that can be very time consuming and I am really only talking about a
first order spice approximation.
Thank you to all who respond.
Tom
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