Hitendra, A few historical comments/observations while we are all waiting for some specific technical recommendations: In the standard bus industry (VME,FB+ cPCI) the migration of termination resister packaging was from soldered axial lead discrete termination components, to socked discrete termination components to small form factor SMT DIP resister networks. ESR characteristics of all capacitors used at higher bus speeds became increasingly important. I haven't seen discussion of the high-frequency characteristics of termination resisters for backplanes, however for calibration structures used for de-embedding measurements, this subject seems to generate a good deal of discussion. The problem of designing a practical structure that has the desired RCL behavior at data rates above 3 Gbps seems to be a non trivial task. Lastly, at the zenith of high bit width parallel multi-drop BTL architectures (i.e. 256-bit Futurebus), just feeding power into the termination networks efficiently enough to maintain switching voltage tolerances became an unanticipated design problem (well unanticipated by most with the exception of C.Michael Hayward). Anyway, the di/dt requirements for those architectures resulted in a variety of solutions. Luckily, the requirements of single ended differential fabrics at LVDS voltages, made those di/dt problems go away from the standpoint of power deliver, at least so far as I understand the problem. Now achieving ideal termination to reduce reflections and therefore improve the available noise margin seems to be driving the need to design termination structures that have the desired behavior at these potentially blistering fast edge rates. Still waiting for a real answer, michael munroe "A Copper Alliance; Dedicated to Copper Pushing copper to its limits. Bustronic Corp. Density, agility and efficiency." 804-240-7188 cell www.bustronic.com www.elma.com www.copperalliance.net -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Hitendra Patel Sent: Monday, July 12, 2004 9:11 AM To: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] High Speed Termination Hello SI Experts!! Just curious whether any one of you have/had experience SI problems pertain to resistor termination due to its packaging or RCL effects. If yes, please share your experience. Thank you and looking forward to read your feedback. Regards, Hitendra :-) ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu