Hi All, ANSYS is hosting a free workshop on "Signal Integrity Analysis using SIwave", at their Irvine office, Friday, October 24th. This workshop provides hands-on experience in computing eye diagrams using statistical transient circuit analysis and creating automated DDR3 pass/fail compliance reports for a PCB design. These workshops are recommended for anyone implementing high-speed interfaces like DDR3 in their designs. For a detailed agenda & to register, please visit the following link: *Irvine, CA: *Friday, October 24, 11:30am - 1:30pm http://www.ansys.com/About+ANSYS/Events/Signal+Integrity+Analysis+Using+ANSYS+SIwave-Irvine-10-24-14 Kind Regards, -Margaret ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu