[SI-LIST] Free Signal Integrity Analysis Workshop at ANSYS Irvine, Friday Oct 24th

  • From: Margaret Schmitt <margaret.schmitt@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Thu, 16 Oct 2014 10:02:16 -0700

Hi All,
ANSYS is hosting a free workshop on "Signal Integrity Analysis using
SIwave", at their Irvine office, Friday, October 24th.

This workshop provides hands-on experience in computing eye diagrams using
statistical transient circuit analysis and creating automated DDR3
pass/fail compliance reports for a PCB design. These workshops are
recommended for anyone implementing high-speed interfaces like DDR3 in
their designs.

For a detailed agenda & to register, please visit the following link:

*Irvine, CA:  *Friday, October 24, 11:30am - 1:30pm
http://www.ansys.com/About+ANSYS/Events/Signal+Integrity+Analysis+Using+ANSYS+SIwave-Irvine-10-24-14

Kind Regards,
-Margaret


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  • » [SI-LIST] Free Signal Integrity Analysis Workshop at ANSYS Irvine, Friday Oct 24th - Margaret Schmitt