[SI-LIST] Fr 4 Er variation
- From: "Scott McMorrow" <scott@xxxxxxxxxxxxx>
- To: steven.salkow@xxxxxxxx
- Date: Thu, 25 Sep 2003 14:32:31 -0700
FR-4 is an interesting material from an Er point of view, because it is
a composite material, composed of fiberglass and epoxy resin. Each
laminate construction type (1080, 1213, 2116 ... etc) has an "average"
Er that depends upon the ratio of epoxy to fiberglass. The epoxy resin
used in laminate construction has an Er of somewhere around 3.2, and a
loss tangent of around .035. The fiberglass used in laminate
construction has an Er of somewhere around 5.5. Mix the two in
different proportions and you get a composite average Er of between 3.6
and 4.8 in the GHz range, with a general average of between 3.9 and 4.3.
As a side note, higher performance FR-4-type materials, like Nelco
4000-13SI, replace either the epoxy, or the fiberglass, with lower
loss, lower Er versions. SI glass has an Er of around 3.8, which
pulls the whole average Er down into the 3.2 -3.3 range. And since
the variation between the Er of the epoxy and glass is much smaller,
Er variation across a range of construction types is much smaller
than conventional FR-4.
If you know what construction is used in your PCB layers, then you can
compute a fairly accurate Er for the composite material, based upon the
resin percentage. If you go over to the parknelco website and register,
they have a fairly nifty Dielectric Calculator for all of their
laminates, that plots Er and loss tangent (dissipation factor) at 1 MHz,
1 GHz, 2.5 GHz and 10 GHz . I've found that the resultant Er is
extremely accurate for the constructions that I use.
Once you understand that the FR-4 is a composite material, and that the
Er of each of the contributors to the composite is fairly well defined,
you can then compute the average Er quite accurately. My impedance
predictions for boards generally come in within 5% of nominal the first
time. And as long as you stick with the same laminates and
construction, the Er ain't gonna change very much. Most of the
impedance variation in boards is due to the mechanical manufacturing
tolerances of the material, the layer pressed thickness, and the trace
etch tolerance. Trace etch tolerance and layer thickness are usually
the largest components to impedance variation.
There are local variations in where the fiber bundles lay, that cause
variations in Er in local regions. These are important for the
impedance control of tightly spaced differential pairs. But on an
average basis, the Er of a particular layer with a particular
construction is reasonably constant. It most certainly does not span
the full range from 3.8 to 4.8 ever. But different construction
techniques will produce a range that is this large.
If you specify and control your layer construction with FR-4, you can
obtain tolerances that are quite tight, and do this "by design" not by
trial and error. Then if you measure and characterize the Er and Loss
Tangent for your particular construction, you can further iterate and
converge on designs that have even better tolerances.
Best regards,
scott
--
Scott McMorrow
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
(503) 239-5536
http://www.teraspeed.com
Salkow, Steven wrote:
>FR 4 varies from 3.9 to 4.8 if you live long enough. Normally, a given batch
>is closer to 4.3~ 4.7. It you need to meet specific impedances, specify what
>they are. Put impedance coupons in both the X and Y directions to verify each
>panel.
>Controlling impedance to +/- 10% is routine and +/- 5% cost more $. You design
>need to necessarily adjusted by the vendor for material differences
>fortunately you don't need to do anything special to make this happen.
>
>Steve Salkow
>Lockheed Martin
>
>-----Original Message-----
>From: Jon Powell [mailto:jonpowell@xxxxxxxxxxxx]
>Sent: Thursday, September 25, 2003 8:05 AM
>To: Loyer, Jeff
>Cc: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: impedance relation with frequency...
>
>
>Actually I wasn't referring to Er variation in a given batch so much as
>variation across a large manufacturing run. How about a counter question:
>What is the observed Er of FR4? That is, given any random sample, what is
>the range?
>
>
>-----Original Message-----
>From: Loyer, Jeff [mailto:jeff.loyer@xxxxxxxxx]
>Sent: Thursday, September 25, 2003 7:55 AM
>To: Jon Powell
>Cc: si-list@xxxxxxxxxxxxx
>Subject: RE: [SI-LIST] Re: impedance relation with frequency...
>
>
>Hi Jon,
>Your posting made me a bit curious - it seems to imply that you've seen
>large Er variations in PCB's.
>
>I agree that I expect much larger variation of Z0 than is shown in the 2nd
>graph of Martyn's posting, so the effect of Er variation on Z0 is
>insignificant compared to other effects - etching and thickness variations,
>etc.
>
>On the other hand, I personally have seen very little variation in Er, as
>derived from Vp measurements using TDR (or S21 phase w/ VNA). Have you seen
>substantial Vp variations (or some other variation that you would directly
>attribute to Er variation)?
>
>Jeff Loyer
>
>-----Original Message-----
>From: Jon Powell [mailto:jonpowell@xxxxxxxxxxxx]
>Sent: Thursday, September 25, 2003 7:37 AM
>To: martyn.gaudion@xxxxxxxxxxxxxxxxxxxx; Loyer, Jeff
>Cc: si-list@xxxxxxxxxxxxx
>Subject: RE: [SI-LIST] Re: impedance relation with frequency...
>
>
>I would expect to see greater ranges in Er and Zo across a board (or set of
>boards) just from manufacturing tolerances. Is this sort of effect really
>big enough to enter into the equation? Isn't this magnitude of change
>completely swamped by other (more or less random) considerations? For
>instance, what is the tolerance of Er for FR4 for any given manufacturing
>line or run? (or even the tolerance for thickness across a board).
>
>
>If you have little or no control over a large variable, then why bother with
>worry over a small contributor?
>
>jon
>
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx
>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Martyn Gaudion
>Sent: Tuesday, September 23, 2003 3:29 PM
>To: jeff.loyer@xxxxxxxxx
>Cc: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: impedance relation with frequency...
>
>
>Hi Jeff,
>
>A number of posts have discussed loss on silicon and
>on longer PCB traces, however loss also starts to become significant
>on fine line (3mil and less) traces especially where copper weights
>under 1/2 ounce are employed.
>
>
>On broader traces where dc and ac series loss is insignificant
>you can get an idea of the expected variation over frequency
>by graphing the change in Zo due to Er change, - many laminate
>manufacturers will have the graphs. Zo varies as 1/sq root Er so
>in a lossless case the variation is small. Most of the change
>occurs as Andy points out at the lower end of the frequency
>spectrum.
>
>Here is a link to a fairly generic graph of Zo Vs Frequency for
>FR4
>
>http://www.polarinstruments.com/support/cits/images/ap155_1.jpg
>
>And the resultant modelled variation in impedance (lossless case)
>
>www.polarinstruments.com/support/cits/images/ap155_2.jpg
>
>Kind regards
>Martyn Gaudion
>www.polarinstruments.com
>
>
>
>
>At 12:40 PM 24/09/03 -0700, you wrote:
>
>
>>Hi Andrew,
>>I would like some help understanding the difference between board traces =
>>and "chip lines". My experience has been that I can TDR a trace using a =
>>35ps risetime, or through 100 and 400ps filters, and measure the same Z0 =
>>for that trace. This would seem to be backed up by the fact that there =
>>is no compensation made when measuring traces with different TDRs, =
>>regardless of their risetime.
>>
>>I just confirmed that again, measuring the same 3" microstrip trace with =
>>no filter, and 100ps and 400ps filters, and finding the TDR and TDT =
>>waveforms stabilize at the same level, regardless of the risetime. Of =
>>course, there's significant impact to the risetime of the TDT, but the =
>>Z0 of the trace (as indicated by the DC level of the TDR trace) remains =
>>constant.
>>
>>This implies to me that the Z0 of the trace is constant for 10GHz , =
>>3.5GHz, or 875MHz (35ps, 100ps, 400ps risetimes, respectively).
>>
>>My experience with VNA seems to substantiate this - S11 typically =
>>remains fairly constant (other than resonances at lambda/4, etc.) while =
>>S21 varies with frequency due to loss effects.
>>
>>Is there something else I'm missing?
>>
>>Jeff Loyer
>>
>>-----Original Message-----
>>From: andrew.c.byers@xxxxxxxxxxxxxx
>>[mailto:andrew.c.byers@xxxxxxxxxxxxxx]
>>Sent: Wednesday, September 17, 2003 12:05 PM
>>To: jonpowell@xxxxxxxxxxxx; kbagga31@xxxxxxxxx; si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] Re: impedance relation with frequency...
>>
>>
>>Concerning Zo relation with frequency:
>>
>>Once again, depends where you live. On boards, typically the
>>frequency-dependent impedance change starts leveling out at much lower
>>frequencies. Essentially you are approaching the sqrt(L/C) impedance,
>>because your omega*L overwhelms your R. *Usually* by 1MHz your Zo curve =
>>is
>>flat. But if you are modeling chip lines, your R value for the line =
>>might be
>>comparable (or greater) than omega*L up to a couple GHz or so. Then you
>>cannot ignore this frequency dependent behavior. I have seen a typical =
>>line
>>on chip go from about Zo=3D100ohms @100MHz, to Zo=3D63ohms @1GHz, to =
>>Zo=3D55ohms
>>@10GHz. Measurement, simulation, theory, literature, and gut feel all =
>>back
>>this up.=20
>>
>>So the bottom line (as it always is in the world of interconnect =
>>modeling)
>>is it depends on how high you go in frequency, the dimensions of line =
>>you
>>are using, and if you are designing in a narrow band or a wide band.
>>HOWEVER, as Jon pointed out, you can often see greater variations due to
>>coupling from nearby traces. Plus you have to remember that impedance
>>control is an issue too - usually +/- 10% is as good as it gets for
>>run-of-the-mill PCBs out there (but money talks).=20
>>
>>To get a feel for the numbers I got above, you can use a 2D field solver
>>that handles the frequency dependent behavior of R and L (ansoft =
>>spicelink
>>or some other flavor). Or you can dig up equations and plug them into a
>>matlab or mathcad. Calculate your R and L and C (usually G is =
>>non-existant
>>or insignificant...) and crunch away.
>>
>>salud,
>>Andy Byers
>>
>> =20
>>
>>-----Original Message-----
>>From: Jon Powell [mailto:jonpowell@xxxxxxxxxxxx]=20
>>Sent: Wednesday, September 17, 2003 9:09 AM
>>To: kbagga31@xxxxxxxxx; si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] Re: impedance relation with frequency...
>>
>>
>>Karen,
>>It is my feeling that the frequency related impedance changes on a =
>>signal
>>will be second order considerations compared to the impedance changes =
>>caused
>>by crosstalk from neighboring wires. These effects can be shown with =
>>most
>>good SI engines. Intel has often recommended (for instance) calculating =
>>the
>>effective impedance when the coupled wires on either side of the target =
>>wire
>>switch simultaneously with the target wire in both the same direction =
>>(all
>>going high and low) and opposite (target going high and low and coupled
>>going low and high).
>>
>>hope this helps (and if I am wrong, I am sure someone will scream at me =
>>so
>>wait a couple of minutes).
>>
>>regards,
>>jon
>>
>>
>>-----Original Message-----
>>From: si-list-bounce@xxxxxxxxxxxxx
>>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of karan bagga
>>Sent: Wednesday, September 17, 2003 2:24 AM
>>To: si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] impedance relation with frequency...
>>
>>
>>Hi
>>
>>>From the telegraphic equations on Transmision lines it seems the =
>>impedance
>>of the Trace varies with frequency.
>>
>>In my design specifications it is specified that my trace should be on =
>>(25
>>+/- 10%) Ohms.
>>How will I do it ? How will I do these kind of analysis?
>>
>>The frequency of the signal is high and also the rise time is =
>>significantly
>>low.
>>Will FFT be of some help here ?
>>
>>Regards
>>Karan.
>>
>>
>>
>>---------------------------------
>>Do you Yahoo!?
>>Yahoo! SiteBuilder - Free, easy-to-use web site design software
>>
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