[SI-LIST] Re: ESD protectioin at a Digital Input
- From: "Frank Dunlap" <fdunlap@xxxxxxxxxxxxxxxxx>
- To: "Vivekkumar M-ERS,HCLTech" <Vivekkumarm@xxxxxx>, "Arun Kumar P N" <arun@xxxxxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 9 Dec 2009 11:06:13 -0800
> Since it has internal protection of 1000V ...
Even with a 1000V ESD event, the on-die ESD clamps should clamp the
voltage seen by the silicon to a safe level, likely a few Volts.
There will be an ESD current level associated with the voltage magnitude
of the ESD event and the type of ESD discharge model under investigation
(Human Body Model or Machine Model). The on-die ESD clamps should steer
this potentially damaging current away from internal circuits. Of
course, off-die external clamps can be used to steer this current away
from the silicon as well.
Regards,
Frank
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Vivekkumar M-ERS,HCLTech
Sent: Wednesday, December 09, 2009 7:00 AM
To: Arun Kumar P N; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ESD protectioin at a Digital Input
Arun Kumar,
Clamping voltage of an ESD should be closely related to the voltage max
the pin of the IC can withstand. Even though the IC supports 1KV ESD
protection, check with the manufacturer about the max voltage the pins
of the IC can withstand. Say manufacturer suggests 10V. Then at max you
can have 15V as clamping voltage.
The danger of having 200V voltage as clamping voltage is that when a
large surge occurs, the IC is subjected to this much voltage and it may
damage the IC.
ESD diodes, another the important factor we need to consider is how much
energy(power dissipation in wattage) it can withstand. This is based on
the open and short circuit voltages and were your end equipment is
placed.
Find attached app note from semtech.
http://www.semtech.com/images/datasheet/transient_immunity_standards_iec
_61000-4-x.pdf
Regards
Vivek
________________________________________
From: si-list-bounce@xxxxxxxxxxxxx [si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Arun Kumar P N [arun@xxxxxxxxxxxxxxxx]
Sent: Wednesday, December 09, 2009 4:16 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] ESD protectioin at a Digital Input
Hi All,
I'm checking for ESD protection at a Digital Input pin.
A Switch is connected to a Schmitt Buffer. The Schmitt buffer is ESD
rated
for 1000V HBM
I'm planning to put an external suppressor for IEC levels, on the PCB
My understanding is the clamping voltage should be less than the max
withstand capability of the pin to be protected.
Since it has internal protection of 1000V, does that mean I can put a
suppressor with a clamping voltage of say 200V?
Or should I use an ESD suppressor with a clamping voltage well below
10V?
Regards
Kumar
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