[SI-LIST] Re: ESD protectioin at a Digital Input
- From: "Pommerenke, David" <davidjp@xxxxxxx>
- To: "Vinod Kumar" <vinodsaharan@xxxxxxxxxxxxxxxx>, "Doug Smith" <doug@xxxxxxxxxx>, "Vivekkumar M-ERS,HCLTech" <Vivekkumarm@xxxxxx>
- Date: Tue, 15 Dec 2009 10:03:16 -0600
Vinod,
In general, I do not suggest to use the term "ground", neither in
grounded equipment, nor in hand held equipment. It just leads to
confusion. It is better to think about current, return current and field
control.
For a hand held device it is worth to distinguish four types of ESD
failure types:
1) Direct discharge into a PIN causes damage, usually to the next IC
2) Discharges to the current return planes, or structural elements cause
field coupling into ICs. This usually does not lead to damage, but in
most cases to upsets
3) Secondary breakdown. The discharge takes place to the handheld
device, the handheld device is connected, e.g., to a charger. The
charger has a two wire power connection. Thus, a voltage will be created
between the charger input and its output, leading to a second spark
inside the charger. This is often called "secondary breakdown". This can
damage the charger.
Secondary breakdown can also occur if there are floating metal parts on
the portable device. They would charge up, and breakdown to the nearest
other metal. If that happens within the portable device, than this
secondary breakdown is very close to ICs, so it often leads to upset
problems.
Regarding current return planes ("GND planes"). In most cases it is the
best to have one solid plane, all ESD protection, Vss etc. connects to
it. If the plane is separated, then one needs to fully understand up to
which frequency this separation really is a separation, which signals
cross the separation and what the consequence of a voltage between the
two planes is.
If an ESD hits a PIN and a protection device, e.g., a 100nF capacitor, a
diode or alike, then current will flow onto the ground plane. This
current will spread. The current densitiy is coupled with the surface
magnetic field. This surface magnetic field will couple in loops formed
by traces, and in portable devices often couple directly into the
leadframe and bond wires of ICs. The ICs will see pretty narrow < 1ns
pulses on their inputs due to the coupling. This can lead to upsets of
the ICs.
Besides the magnetic field coupling there is electric field coupling
which tends to couple more into high impedance circuits (e.g., often
intoLCDs, high impedance turn on circuits, stand by circuits).
If an upset like error occurs in a system the best way to find its root
cause is using ESD scanning. The methodology is explained at
http://scholarsmine.mst.edu/post_prints/SusceptibilityScanningAsFailureA
nalysisToolForSys_09007dcc8052614c.html
Please check http://web.mst.edu/~davidjp/publications.html and
http://scholarsmine.mst.edu/browse/index_by_paper_author_a82714c41ce87a8
8801048e4b67c9bd9.html
for ESD related publications of our group. Please contact me directly
for further analysis of your specific layout.
Dr. David Pommerenke
Missouri University of Science and Technology (MST), former name: UMR
118 EECH, 301 W. 16th Street, Rolla, MO 65409-0040
573 341 4531, cell: 573 308 2019
----- Original Message -----
From: "Doug Smith" <doug@xxxxxxxxxx>
To: "Vivekkumar M-ERS,HCLTech" <Vivekkumarm@xxxxxx>
Cc: "Arun Kumar P N" <arun@xxxxxxxxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
Sent: Thursday, December 10, 2009 12:06 AM
Subject: [SI-LIST] Re: ESD protectioin at a Digital Input
> Hi Arun, Vivek, and the group,
>
> The board layout can easily erase any protection that the protection
> device offers. The actual voltage the IC sees can easily be 10, 100 or
> more times the clamp voltage depending on the board layout. One such
> layout problem is described in my Technical Tidbit for February 2009:
> http://emcesd.com/tt2009/tt020309.htm . However, there are many ways
to
> render the protection device ineffective.
>
> Doug
>
> Vivekkumar M-ERS,HCLTech wrote:
>> Arun Kumar,
>>
>> Clamping voltage of an ESD should be closely related to the voltage
max
>> the pin of the IC can withstand. Even though the IC supports 1KV ESD
>> protection, check with the manufacturer about the max voltage the
pins of
>> the IC can withstand. Say manufacturer suggests 10V. Then at max you
can
>> have 15V as clamping voltage.
>>
>> The danger of having 200V voltage as clamping voltage is that when a
>> large surge occurs, the IC is subjected to this much voltage and it
may
>> damage the IC.
>>
>> ESD diodes, another the important factor we need to consider is how
much
>> energy(power dissipation in wattage) it can withstand. This is based
on
>> the open and short circuit voltages and were your end equipment is
>> placed.
>>
>> Find attached app note from semtech.
>>
>>
http://www.semtech.com/images/datasheet/transient_immunity_standards_iec
_61000-4-x.pdf
>>
>> Regards
>> Vivek
>>
>> ________________________________________
>> From: si-list-bounce@xxxxxxxxxxxxx [si-list-bounce@xxxxxxxxxxxxx] On
>> Behalf Of Arun Kumar P N [arun@xxxxxxxxxxxxxxxx]
>> Sent: Wednesday, December 09, 2009 4:16 PM
>> To: si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] ESD protectioin at a Digital Input
>>
>> Hi All,
>>
>>
>> I'm checking for ESD protection at a Digital Input pin.
>>
>> A Switch is connected to a Schmitt Buffer. The Schmitt buffer is ESD
>> rated
>> for 1000V HBM
>>
>>
>>
>> I'm planning to put an external suppressor for IEC levels, on the PCB
>>
>> My understanding is the clamping voltage should be less than the max
>> withstand capability of the pin to be protected.
>>
>>
>>
>> Since it has internal protection of 1000V, does that mean I can put a
>> suppressor with a clamping voltage of say 200V?
>>
>>
>>
>> Or should I use an ESD suppressor with a clamping voltage well below
10V?
>>
>>
>>
>> Regards
>>
>>
>>
>> Kumar
>>
>>
>>
>>
>>
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>
> --
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> \ / ) P.O. Box 1457
> ========= Los Gatos, CA 95031-1457
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