[SI-LIST] Re: Difference between Edge triggered and Level triggered.
- From: <vince_cavanna@xxxxxxxxxxx>
- To: <k.kanakaraj@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 15 Sep 2004 15:32:12 -0600
Hello Kanak,
An edge triggered storage device responds to the data only during a =
narrow time window surrounding the active clock edge. The width of the =
window is specified by the setup and hold time specs of the device. A =
level triggered device responds to the data during the entire time that =
the clock is high (or low).
Designing with edge triggered devices is generally easier (that is their =
main advantage) and they are less vulnerable to noise, but edge =
triggered devices are more costly. Whereas you can build a =
level-triggered storage element with a single latch you typically need =
two latches, in a master-slave arrangement, to implement an =
edge-triggered storage element.=20
Sometimes your design may not be able to afford the one clock period =
delay that the edge triggered device introduces, and a level triggered =
device may then be more appropriate.
Hope that helps.
Vince
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Kanakaraj
> Sent: Tuesday, September 14, 2004 10:06 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Difference between Edge triggered and Level
> triggered.
>=20
>=20
> Hi all,
> When they design an IC, how do they determine a signal should=20
> be edge triggered or level triggered. Or the other way what=20
> is the advantage of edge triggered over level triggered=20
> signals or vice versa.
> cheers
> kanak
>=20
>=20
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