[SI-LIST] Re: Difference between Edge triggered and Level triggered.
- From: "Jon Powell" <jonpowell@xxxxxxxxxxxx>
- To: <k.kanakaraj@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 15 Sep 2004 08:01:06 -0700
It's been a long time since I was a sophomore but...
We always called level sensitive devices latches and edge triggered
registers.
A register is just two latches in series working on different phases of the
clock.
(the opposite phase to the second latch usually generated locally with an
inverter to
ensure proper timing in the circuit.)
The issues are:
1) Latches use less real-estate (they are "cheaper")
2) Latches are transparent in half the cycle which makes clock distribution
and timing more difficult.
3) Registers are easier to do timing on.
I think these are the main issues. I always used registers unless I had a
good reason to use a latch.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Kanakaraj
Sent: Tuesday, September 14, 2004 10:06 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Difference between Edge triggered and Level
triggered.
Hi all,
When they design an IC, how do they determine a signal should be edge
triggered or level triggered. Or the other way what is the advantage of edge
triggered over level triggered signals or vice versa.
cheers
kanak
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