[SI-LIST] Re: Decoupling capacitors for BGA
- From: "Mark Alexander" <mark.alexander@xxxxxxxxxx>
- To: "Scott McMorrow" <scott@xxxxxxxxxxxxx>
- Date: Thu, 7 Sep 2006 18:16:32 -0600
Scott,
> getting to be antiques
Yes, they are. The good news is that they're safe. We don't see PDS
issues when people build to the rules layed out in those documents.
The revisions and updates are small refinements that cut back on some of
the requiements and suggest some more optimal PCB gemoetries. There's
also some additional information on PDS performance measurement and
testing.
-mark
________________________________
From: Scott McMorrow [mailto:scott@xxxxxxxxxxxxx]
Sent: Thursday, September 07, 2006 4:20 PM
To: Mark Alexander
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: Decoupling capacitors for BGA
Mark,
Thanks for the update. We have a quite a few customers who use your
parts, and we'd like to be able to refer them to the most up to date
information that you provide, as a supplement to what we provide.
Besides, those old guidelines are getting to be antiques. :-)
regards,
Scott
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
http://www.teraspeed.com
Teraspeed(r) is the registered service mark of
Teraspeed Consulting Group LLC
Mark Alexander wrote:
Scott,
The revisions are [still!] not posted yet. Many of the changes are
complete and we're in the publications review loop.
Thanks for the reminder; I'll keep you posted.
-mark
-----Original Message-----
From: Scott McMorrow [mailto:scott@xxxxxxxxxxxxx]
Sent: Thursday, September 07, 2006 2:40 PM
To: Mark Alexander
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: Decoupling capacitors for BGA
Mark
I was wondering if you ever did update those app notes on PDS design.
Did I miss your SI-List post?
Scott
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
http://www.teraspeed.com
Teraspeed(r) is the registered service mark of
Teraspeed Consulting Group LLC
Mark Alexander wrote:
Kishore, Subbu,
I'll note that XAPP623 is getting a bit out-of-date. For more
up-to-date information on the latest techniques, check out the
PDS
section of the Virtex-4 User Guide. Though it's not as generic
as
XAPP623 (it applies specifically to the Virtex-4 device family),
the
basic principles it covers apply fairly well to high-speed
digital
devices and PCBs of 2006.
I'm finishing up revisions/updates for both of these documents;
will
make a post to SI-List when the new versions are published.
-mark
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Kishore Bachu
Sent: Friday, May 12, 2006 3:48 AM
To: subramanian1683@xxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Decoupling capacitors for BGA
Classification: UNCLASSIFIED
Hi Subramanian,
For your reference, you can find the following article in Xilinx
website.
"Power Distribution System (PDS) Design: Using Bypass/Decoupling
Capacitors"
Xapp623.pdf
Regards,
Kishore.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Subramanian R
Sent: Friday, May 12, 2006 2:32 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Decoupling capacitors for BGA
Hello All,
We are using a 0.5mm Pitch 457-Pin BGA Processor. It is running
at a
maximum of 532MHz.
It has 60 Power pins (Core & I/O)
How do i place the Decoupling capacitors?
Now we have placed all decaps (0402 pack) around the BGA (like
an
island) and connected it to the VCC plane. Should i need to
route it
to
the individual pins itself?
The BGA does not have much space between the Balls. So not more
than
4-5
caps can be placed right over the BGA on the other side.
The other thing i can go for is Inter-plane capacitance. But for
that
VCC-GND dielectric should be around 2-3mils, i understand. That
doesn't
look possible with our PCB thickness requirements. It is a
6-layer PCB
Thanks for any suggestions.
Regards
Subbu
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