Hi Stefan, I quite agree with your point of view. However, we usually can't get the details about the package information = from vendors to estimate the performance of it. And vendors' design guides always conservative and redundant. So a spec for PDN co-design simulation is being expected, just like IBIS spec for SI simulation.=20 Best Regards, Zhengrong -----=D3=CA=BC=FE=D4=AD=BC=FE----- =B7=A2=BC=FE=C8=CB: si-list-bounce@xxxxxxxxxxxxx = [mailto:si-list-bounce@xxxxxxxxxxxxx] =B4=FA=B1=ED Stefan Ludwig =B7=A2=CB=CD=CA=B1=BC=E4: 2008=C4=EA5=D4=C224=C8=D5 17:35 =CA=D5=BC=FE=C8=CB: Subramanian R =B3=AD=CB=CD: si-list@xxxxxxxxxxxxx =D6=F7=CC=E2: [SI-LIST] Re: Decoupling at 800Mhz Hi Mani, if the processor runs at 800MHz, it doesn't mean that the decoupling=20 requirement for the PCB will be at 800MHz. Typically, the spikes at=20 800MHz will be taken care of by on-die capacitance. As was said by others on this thread and you below, the mounting=20 inductance of the package on the board and the inductive path through=20 the package to the die will limit what you can do on the board. 1uF in=20 0402s as close to the power/gnd pins of the package, mounted with=20 vias-in-pad or vias to the side of the pads will be the best you can do=20 - in addition to having close spacing between pwr & gnd planes.=20 Typically, what you'll see on the board is in the range of 50-250MHz,=20 depending on how well the package is designed. I hope this helps. Cheers, Stefan Subramanian R wrote: > Hi All, > We are planning to use a processor running at 800 MHz. > I was just reading up on the decoupling methods. > > The Processor PCB guidelines recommend using 1uF 0402 pack for high > frequency decoupling. But at 800 MHz, will not the cap/package = inductance > dominate. > > The guideline doesn't say anything about plane decoupling also. > > Am I missing something? What are the best approaches for decoupling? > > Any suggestions will be very useful. > > Thank you in advance, > > Regards > Mani > =20 --=20 Ludwig Systems Engineering Consulting - Design - Implementation WWW: www.ludwigsystems.com System Architectures - FPGAs - PCBs Ph/Fx: +41-43-355-58-73/74 Hardware - Firmware - Software ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: =20 //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu =20 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu