[SI-LIST] Re: DF spec for PCB materials
- From: "Istvan Nagy" <buenos@xxxxxxxxxxx>
- To: <jeff.loyer@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 15 Aug 2012 20:48:40 -0700
Hi,
Thanks, actually it does help.
So I will focus on the typical value and try to get the FAB measure the loss
per unit length.
Eric Bogatin had an article where he referred to you and intel's method
about SET2DIL measurements.
Do you do this measurement on every batch of PCBs or every panel? On the
same coupon as the impedance?
The other interesting thing is who pays for the manufactured panels where
the loss does not meet the specified value... Often when a new type of
requirement comes up, a lot of people especially at the fab try the
requirement to look illegitimate or ridiculous. Wel, its a fight.
I will try to come up with some spec values for this.
I would not use microstrip for high speed, since all my designs are real
products and very dense as well, unlike reference designs where they have a
lot of space for routing on outer layers.
I am working with far east assembly company who is now standing between me
and the PCB fab, so the communication channel for this issue seem to have
too much dropped packets... I used to work at smaller companies in Europe,
and always dealt with the fabs myself. Do you do it directly, or through
another company, broker, other department...
Regards,
Istvan Nagy
Fortinet
-----Original Message-----
From: Loyer, Jeff
Sent: Monday, August 13, 2012 8:24 AM
To: buenos@xxxxxxxxxxx ; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: DF spec for PCB materials
I've never seen any other value than 0.035 specified as max Df. I'm not
sure what that ridiculous number means - it seems senseless to me. I pay
attention to their "typical" values and use the 1GHz value, just to keep it
consistent (everyone quotes at least a 1GHz value). Some other notes to
control insertion loss on PCB constructions:
* When trying to predict relative loss between materials, you might
calculate sqrt(Er) * Df, rather than only using Df; dielectric loss will be
proportional to this.
* Be sure to specify either RTF or VLP; you can kill your low-loss material
by using standard (HTE) copper
* This may not help you with the microstrip traces - your supplier may
insist on HTE copper for outer layers. Some suppliers can use RTF on outer
layers.
* Loss on outer layers is very hard to predict/model/control. If
insertion loss is critical, you'll want to stay on inner layers. If you do
use them, be sure to measure and monitor your insertion loss (see note below
on verifying insertion loss).
* Be sure to not allow aggressive Oxide Alternative (OA) adhesion
treatments - they can also wreak havoc on your insertion loss.
* You'll want to verify your actual insertion loss meets your expectations.
Many PCB suppliers are now SET2DIL-capable and can measure the final product
and report insertion loss (dB/inch) at 4 & 8 GHz. That will give you
assurance that something hasn't been introduced that craters your insertion
loss.
* Once you find a "recipe" which meets your insertion loss requirements,
you'll want to "lock down" that recipe: specify that absolutely no changes
are allowed unless you go through a requalification effort (measuring
insertion loss w/ the changes).
I hope this helps,
Jeff Loyer
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Nagy István
Sent: Thursday, August 09, 2012 10:21 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] DF spec for PCB materials
Hi, I am trying to select a material for a few projects (small add-in cards
as well as ATCA) that will support 10GBase-KR 10Gbps and similar signals.The
better but still non-exotic materials datasheets all state typical DF (loss
tangent) values around 0.004-0.009, but all say spec value of 0.035 which is
a lot higher. I am guessing that the spec value may refer to the closest IPC
slash sheet category?Do you work with typical or spec DF values for your
~10Gbps board designs?What is the relevance of the two numbers for larger
series production? Regards,Istvan NagySr. Hardware Development
EngineerFortinet, Sunnyvale CA
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List forum is accessible at:
http://tech.groups.yahoo.com/group/si-list
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List forum is accessible at:
http://tech.groups.yahoo.com/group/si-list
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List forum is accessible at:
http://tech.groups.yahoo.com/group/si-list
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
