Raja It really depends on the memory configuration, but it is likely that the compensation capacitor for address/command signals will be required for heavily loaded DDRII systems. Micron has a good description of this approach in their DDRII app notes, but it basically involves replacing the series stub resistor on the address bus with a capacitor to ground. With multiple unbuffered DIMMs at high DDRII speeds this approach will help open the eye for meeting setup and hold. You will need to simulate your specific configuration to know for sure if it will help and what component values to use. Ryan Bethel ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu