[SI-LIST] Re: Cmos I/O & GTL I/O
- From: Chris Cheng <chris.cheng@xxxxxxxxxxxx>
- To: "'sunil-chandra.kasanyal@xxxxxx'" <sunil-chandra.kasanyal@xxxxxx>,si-list@xxxxxxxxxxxxx, parthsv@xxxxxxxxx
- Date: Mon, 17 Nov 2003 15:53:38 -0800
Sunil,
While your description of GTL as open drain is conceptually correct, most of
the currently implementation has some sort of pull up damping at the
driver's end to reduce the turn off ringing. This has been a nagging problem
since day one when Bill Gunning and some of us together developed the first
GTL system. To me, the beauty of GTL is not the open drain aspect of the I/O
but rather the control turn-off of the strong driver. And this is the only
thing Bill patented. To get around his patent, most of the other companies
choose to use a weak pull up driver as damping during turn-off. Thus other
than the original SUN and a few other licensees of true GTL, most of the so
call GTL I/O in the market is really an asymmetrically driver I/O. As you've
mentioned, GTL was originally intended to be for "heavily loaded" backplanes
(long traces with >10 loads), it was never meant to be optimized for lighter
loaded bus such as process/chip sets bus. In fact, I choose to use a CMOS
I/O in the processor bus on the follow up generation after I was done with
the first GTL system and it ran just as fast as the GTL bus (although with
much lighter load).
GTL I/O does not necessary means single trip signal delay neither. Like all
open drain I/O, there is a common problem called bus "ping pong" glitch that
takes round trip delay to settle, just as bad as source terminated CMOS.
Finally, as mentioned above, GTL being asymmetric pull up/down driver, it is
inheritably more difficult to design a source synchronous bus with it when
compare with even a simple balanced CMOS driver.
Please don't take it as I want to say GTL is not a good I/O, I am proud of
what Bill and my team did almost 15 years ago but time and technology have
changed. The system environment and bus architecture imposed on us then was
VERY different from what we have right now.
I will take a balance CMOS driver from my source synchronous bus any day.
HTH.
-----Original Message-----
From: Sunil Chandra KASANYAL [mailto:sunil-chandra.kasanyal@xxxxxx]
Sent: Sunday, November 16, 2003 11:50 PM
To: si-list@xxxxxxxxxxxxx; parthsv@xxxxxxxxx
Cc: Sunil Chandra KASANYAL
Subject: [SI-LIST] Re: Cmos I/O & GTL I/O
Partha,
'Source terminated CMOS I/O' means the IO whose output impedance is
equal to the transmission line impedance for matching at the source end.
It is not necessary to keep the output buffer impedance equal to the
trasmission line impedance, but the matching can be achieved by
providing a resistance at source end. If your driver has perfact
matching with transmission line than this architecture will be same as
the series terminated case.
GTL has the open drain architecture of output buffer having very
high
current sinking capability. GTL IO is terminated at the receiver end of
the transmission line.
In source terminated case, signals are terminated at source end
after
reflection at receiver end, but in case of GTL, signal is terminated at
the end of the transmission line and no reflections will be there if
termination is proper.
CMOS IOs are generally used for lower frequency of operation which
is
about 50 to 60 MHz. GTL IOs are used for backplan operation where driver
current capability is required very high (about 40mA).
Also, source terminated IOs are not preferred for multidrop
application
but if termination is at the receiver end, IOs can be used for multidrop
operations.
Am I right ??
Thanks and Regards,
Sunil C Kasanyal
-------------------------------------
Hi all,
What does it mean when one says 'Source Terminated
CMOS I/O'? How is it different compared to GTL(Gunning
Trancsiever Logic I/O) and what are their advantages &
disadv when compared with each other?
Thanks in Advance,
Regards,
Partha!
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