[SI-LIST] Re: Clock signal termination

  • From: "Ingraham, Andrew" <Andrew.Ingraham@xxxxxxxxxx>
  • To: <lucas_bossetti@xxxxxxxxxxx>
  • Date: Wed, 24 Apr 2002 12:40:36 -0400

I wrote:
>  
> My guess: trial-and-error.

I didn't mean this to sound like no thought went into it, that someone
just threw parts at it until it got better.  It could be that the
designer found a problem, perhaps the noise margins at the load were
asymmetrical or that positive overshoot was a problem, found or knew
that this combination worked well to tame it, and chose the resistor
value based on simulations or measurements.  Or maybe they are there to
reduce the signal level in the high state.

The other distinct possibility, is that the driver is ECL, and the 178
ohm resistors are required to provide the necessary pull-down current.
(The fact that the driver's output impedance is 7 ohms could be a
tip-off, because 7 ohms was the typical output impedance of popular ECL
drivers.)  In that case, 178 ohms would be a trade-off between (1)
keeping the driver in conduction on falling edges, (2) maintaining
sufficient receiver input amplitude (since some signal is lost in the
voltage divider that is formed), and (3) power dissipation.  One might
move the pull-down resistors back to before the two 36 ohm resistors,
eliminating most of the voltage divider amplitude loss, but in some
cases they can provide a little benefit where they are.

Andy


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