[SI-LIST] Re: AW: Split in Reference Planes for XAUI
- From: shivanand Bagalkot <shivanandbagalkot@xxxxxxxxx>
- To: Subramanya_CK@xxxxxxxxxxx
- Date: Mon, 25 Jun 2012 13:35:57 +0530
HI Subramanya,
for the copper width calculation use.
http://circuitcalculator.com/wordpress/2006/01/31/pcb-trace-width-calculator/
On Mon, Jun 25, 2012 at 1:03 PM, Havermann, Gert <Gert.Havermann@xxxxxxxxxxx
> wrote:
> Subramanya,
> the only way to keep reference over splited plane is to use stitching caps
> to provide a current return path from one plane to the other. This is not
> an ideal solution, as crosstalk will rise, but at least it helps to control
> EMC behavior. You can also use an non symmetrical impedance cell that keeps
> the signal lines closer to the non splitted GND-plane (i.e. thin dielectric
> between signal and gnd, and thicker dielectric between power and signal).
> This reduces the amount of return current that has to pass the split.
>
> Regarding the copper thickness I recommend to use the SI-List archive
> //www.freelists.org/archives/si-list there have been many useful
> information, software tool recommendations and formulas that were discussed.
>
> BR
> Gert
>
>
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> -----Ursprüngliche Nachricht-----
> Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> Im Auftrag von Subramanya C.K
> Gesendet: Montag, 25. Juni 2012 08:20
> An: si-list@xxxxxxxxxxxxx
> Betreff: [SI-LIST] Split in Reference Planes for XAUI
>
> Dear Gurus,
> This is an old topic on split planes, but just wanted to get an opinion
> from experts regarding reference plane for XAUI signals in my current
> assignment.
> There is a possibility that some of these XAUI lines in my new PCB might
> cross the split planes in power layer that is beneath this signal layer
> where these XAUI lines are routed. These islands in the power layer are
> used for -48V and RTN power rails of the system. I am unable to accommodate
> these lines elsewhere on the PCB due to space constraints. Is there any way
> by which I don't end up losing ground reference for these lines?
>
> Another question, is there a rule of thumb to determine the copper
> thickness / area of copper layers based on the power requirement?
>
> Thank you all in advance for your help..
>
> Best Regards,
> Subramanya C K
>
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Regards
Shivanand
9972207736
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