[SI-LIST] Re: AC Coupling for SERDES Links across Backplane
- From: steve weir <weirsp@xxxxxxxxxx>
- To: "Harjeet Randhawa" <harjeet.randhawa@xxxxxxxxxxxxxxxxx>, "Vinu Arumugham" <vinu@xxxxxxxxx>
- Date: Fri, 29 Oct 2004 08:31:51 -0700
Harjeet, there is more to hot swap than just polite I/Os. But polite I/Os
do help.
Steve
At 03:05 PM 10/29/2004 +0530, Harjeet Randhawa wrote:
>Hi Vinu,Steve,
>
>The IOS on the chip are HOT SWAP capable.
>
>Best Regards,
>/---------------------------------------------------------/
>Harjeet S Randhawa,
>Nevis Networks India Pvt. Ltd,
>B-101, Bhau Patil Marg,
>34, Aundh Road, Pune - 411 020.
>Tel: +91-20-403-3900, Xtn:290,
>Fax:+91-20-403-3904,
>Cell: 0-9890130611.
>/--------------------------------------------------------/
>
>-----Original Message-----
>From: Vinu Arumugham [mailto:vinu@xxxxxxxxx]
>Sent: Friday, October 29, 2004 1:24 AM
>To: Harjeet Randhawa
>Subject: Re: [SI-LIST] AC Coupling for SERDES Links across Backplane
>
>If you need to support hot-insertion or powered down line cards, AC
>coupling makes it easier.
>
>Thanks,
>Vinu
>
>Harjeet Randhawa wrote:
>
> >Hi All,
> >
> >The XAUI spec mandates putting the AC coupling CAPs for the SERDES
>links
> >to allow inter-operability among different SERDES technology vendors
>due
> >to probable different internal BIAS levels.
> >
> >But for the scenarios where the SREDES cells are same does it helps in
> >any way to AC Couple the SERDES links. The scenarios may be where there
> >is 40" of PCB trace running from a line card to backplane and finally
>to
> >a Fabric Card.
> >
> >The SERDES cells are matched in the sense that they are having same
> >characteristics and from same vendor. The BIAS voltage is generated on
> >board with 5% regulation. I do not expect any high current transients
>on
> >the BIAS voltage and it is well filtered and decoupled.
> >
> >Also there is a consistent Ground Plane bridging at backplane
>connectors
> >so the GND differential across the TX to RX points should not cause any
> >significant BIAS reference shifts.
> >
> >The whole issue is due to fact that the Transmit Pairs of the SERDES
>are
> >2-3 rows deep in the package so adding the AC Cap will force to add two
> >more VIAs on the routes adding to deterioration of the signaling
> >quality.
> >
> >Thanking all in advance for their valuable suggestions.
> >
> >Best Regards,
> >/---------------------------------------------------------/
> >Harjeet S Randhawa,
> >Nevis Networks INC.
> >/--------------------------------------------------------/
> >
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