[SI-LIST] Re: 8B10B encode/decode
- From: "Kedar P Apte" <kedar.apte@xxxxxxxxx>
- To: <yafei_bi@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 12 May 2006 10:46:37 +0530
Hi Yafei Bi,
As per my understanding there are 2 methods primarily
1. you implement the algorithm as it is for encoding and decoding.
2. you implement an LUT based hardware.
out of this I think algorithm will have less hardware (I had an
experience
of LUT method)
further more if you want this as a synchronous system then also it will add
up in to your hardware considering any pipeline architecture you want.
may be some more responses will tell you bit more
Thanks & Regards,
Kedar
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Yafei Bi
Sent: Friday, May 12, 2006 12:06 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] 8B10B encode/decode
Hi, SI experts,
Can someone explains to me how 8B10B encoding/decoding
can be implemented with minimum hardware?
I am aware of the concept but don't know much about
the details to figure out how much hardware(in this
case, silicon area) is needed to implemented the
functions.
Arew there any other ways to encode the data stream to
ensure DC balance, and requires very few gates?
any suggestion/web links are appreciated.
Thanks
Yafei Bi
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