[SI-LIST] Re: 10 Layer Stackup Recommendation for Board with High speed Signals(SERDES/DDR)
- From: Jory McKinley <jory_mckinley@xxxxxxxxx>
- To: steve weir <weirsi@xxxxxxxxxx>
- Date: Wed, 8 Aug 2012 13:29:52 -0700 (PDT)
Unbalanced not so good for yield in keeping with 10-layers only lets try, with
the core being double thick (between PWR1 and PWR2) not ideal due to
decoupling/cavity but with core and good z-direction stitch will provide signal
isolation for limit of layers.
TOP/GND
SIG1 - SERDES / DDR2/High Speed Signals
SIG2 - DDR2
GND
PWR 1
PWR 2
GND
SIG3 - DDR2
SIG4 - SERDES / DDR2/High SpeedSignals
BOTTOM/GND
________________________________
From: steve weir <weirsi@xxxxxxxxxx>
To: Jory McKinley <jory_mckinley@xxxxxxxxx>
Cc: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
Sent: Wednesday, August 8, 2012 3:20 PM
Subject: Re: [SI-LIST] Re: 10 Layer Stackup Recommendation for Board with High
speed Signals(SERDES/DDR)
There are a couple of problems:
1. Unbalanced construction
2. The top could be useless as a plane depending on what and how
many parts are used.
Best Regards,
Steve.
On 8/8/2012 11:21 AM, Jory McKinley wrote:
How about this:
>
>
>TOP/GND
>SPLIT PWR1/2
>GND
>SIG1 - SERDES / DDR2/High Speed Signals
>
>SIG2 - DDR2
>
>GND
>SIG3 - DDR2
>SIG4 - SERDES / DDR2/High SpeedSignals
>GND/ISOLATED PWR (covered by bottom ground and no signal
reference)
>BOTTOM/GND
>
>
>
>
>
>
>
>
>
>Jory McKinley
>McKinley Consulting
>e-mail: jory_mckinley@xxxxxxxxx
>phone: (774)-285-2859
>
>
>________________________________
> From: steve weir <weirsi@xxxxxxxxxx>
>To: si-list@xxxxxxxxxxxxx
>Sent: Wednesday, August 8, 2012 1:46 PM
>Subject: [SI-LIST] Re: 10 Layer Stackup Recommendation for Board with High
>speed Signals(SERDES/DDR)
>
>That stack-up could be in real trouble: Big cavities, plus
lot's of
>single-ended injection usually spells trouble. If you plan
to route the
>DDR2 Manhattan using L3 and L8 as a routing pair, then about
your only
>hope is if you forgo Power2 and make that also GND.
Otherwise,
>something will have to give.
>
>Steve
>On 8/8/2012 6:32 AM, Prashanth Rajappan wrote:
>> Hi All,
>> I am looking for suggestions for our PCB which has high
speed interfaces like SERDES /DDR2/GIGA BIT Ethernet.The
current stackup is given below.
>>
>> Top
>> GND
>> SIG1 - SERDES / DDR2/High Speed Signals
>> SIG2 - DDR2
>> POWER1
>> GND
>> SIG3 - DDR2
>> SIG4 - SERDES / DDR2/High SpeedSignals
>> POWER2
>> BOT
>>
>> PLease let me know your comments or suggestion
regarding the same.
>>
>> Thank you in advance!
>>
>>
>> Regards
>> Prasanth
>>
>>
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>
>
>--
>Steve Weir
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--
Steve Weir
IPBLOX, LLC
150 N. Center St. #211
Reno, NV 89501 www.ipblox.com (775) 299-4236 Business
(866) 675-4630 Toll-free
(707) 780-1951 Fax All contents Copyright (c)2012 IPBLOX, LLC. All Rights
Reserved.
This e-mail may contain confidential material.
If you are not the intended recipient, please destroy all records
and notify the sender.
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