[SI-LIST] Re: 10 Layer Stackup Recommendation for Board with High speed Signals(SERDES/DDR)

  • From: Joel Brown <joel@xxxxxxxxxx>
  • To: jory_mckinley@xxxxxxxxx
  • Date: Wed, 8 Aug 2012 11:40:10 -0700

I understand that having the power near the outer layers reduces inductance
of the PDN.
But this is how we would typically do it:
Top
GND
SIG1 - SERDES / DDR2/High Speed Signals
SIG2 - DDR2
GND
POWER1
POWER2
GND
SIG3 - DDR2
SIG4 - SERDES / DDR2/High SpeedSignals
GND
BOT

On Wed, Aug 8, 2012 at 11:21 AM, Jory McKinley <jory_mckinley@xxxxxxxxx>wrote:

> How about this:
> TOP/GND
> SPLIT PWR1/2
> GND
> SIG1 - SERDES / DDR2/High Speed Signals
>
> SIG2 - DDR2
>
> GND
> SIG3 - DDR2
> SIG4 - SERDES / DDR2/High SpeedSignals
> GND/ISOLATED PWR (covered by bottom ground and no signal reference)
> BOTTOM/GND
>
>
>
>
>
> Jory McKinley
> McKinley Consulting
> e-mail: jory_mckinley@xxxxxxxxx
> phone: (774)-285-2859
>
>
> ________________________________
>  From: steve weir <weirsi@xxxxxxxxxx>
> To: si-list@xxxxxxxxxxxxx
> Sent: Wednesday, August 8, 2012 1:46 PM
> Subject: [SI-LIST] Re: 10 Layer Stackup Recommendation for Board with High
> speed Signals(SERDES/DDR)
>
> That stack-up could be in real trouble:  Big cavities, plus lot's of
> single-ended injection usually spells trouble.  If you plan to route the
> DDR2 Manhattan using L3 and L8 as a routing pair, then about your only
> hope is if you forgo Power2 and make that also GND.  Otherwise,
> something will have to give.
>
> Steve
> On 8/8/2012 6:32 AM, Prashanth Rajappan wrote:
> > Hi All,
> > I am looking for suggestions for our PCB which has high speed interfaces
> like SERDES /DDR2/GIGA BIT Ethernet.The current stackup  is given below.
> >
> > Top
> > GND
> > SIG1 - SERDES / DDR2/High Speed Signals
> > SIG2 - DDR2
> > POWER1
> > GND
> > SIG3 - DDR2
> > SIG4 - SERDES / DDR2/High SpeedSignals
> > POWER2
> > BOT
> >
> > PLease let me know your comments or suggestion regarding the same.
> >
> > Thank you in advance!
> >
> >
> > Regards
> > Prasanth
> >
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> --
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-- 

*Joel Brown**
*

**Chief Electrical Design Engineer

*Z Microsystems, Inc.*

9820 Summers Ridge Rd.

San Diego, CA  92121

Tel:  858-831-7011

Fax:  858-831-7001

joel@xxxxxxxxxx

http://www.zmicro.com


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