well, i would suggest u not to route the clock signals in serpantine manner, not only clock signal, any high frequency or oscillating signals for that matter. Yes, Clock signlas or signals from Crystals or high frequency devices must be routed with shortest traces as possible, but in this case, say 2.5 inch has been specified because its a clock signal which is going to trigger few ICs, and they have to be triggered after certain delay, and the length of the route 2.5 inch will provide the delay required for that ic to be triggered. Just route the trace as lengthy as possible, but try avoid routing the signal in a closed serpantined manner. that may result in crosstalk and may induce noise to the nearby circutries any suggestions from members..?? Regards ROM ----- Original Message ----- From: "rishikesh pawar" <rishi179@xxxxxxxxxxx> To: <pcbforum@xxxxxxxxxxxxx> Sent: Friday, May 30, 2003 11:25 AM Subject: [pcbforum] clock routing > hi all , > i am new subscriber, i have been reading all ur mails and found very helpfull in designing. > > i am designing board with plx chip with pci slot, the specification given that pci to plx signal should be small as possible , but clock signal must be 2.5 inches, i have routed clk in serpentine manner(tunning method) to match length, but i read somewhere that clk signal should be straight as possible, but how it could be possible to have matched length without tunning. or tunning method will do for clock, > > suggest me best option. > > > thanks in advance. > > rishi. > > Catch all the cricket action. Download Yahoo! Score tracker >