[PCB_FORUM] Re: Relative delay and differential pairs...
- From: "Austin Franklin" <austin@xxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Mon, 14 Mar 2005 08:03:07 -0500
Hi Gerry,
> It's so easy to put both in the match group why bother not too.
Sure, but if it isn't needed, why do it? I'd prefer to not have multiple
constraints that aren't needed.
> If you only apply it to one which one?
It shouldn't matter.
> Is the same net always going to
> be the shortest in the pair? Etc?
The other phase of the signal will follow it's "mate" with the phase
tolerance constraint, so I don't see how that would matter. Do you have an
example in mind of what you believe is a potential problem with only
specifying one phase?
Regards,
Austin
> -----Original Message-----
> From: Austin Franklin [mailto:austin@xxxxxxxxxxxx]
> Sent: Sunday, March 13, 2005 11:43 PM
> To: icu-pcb-forum@xxxxxxxxxxxxx
> Subject: [PCB_FORUM] Relative delay and differential pairs...
>
> Hi,
>
> Do you guys specify the 2nd leg of the differential pair in a match
> group?
> If so, what would the reason be? I am assuming I only have to specify
> one leg of a DP in a match group and the other leg will be handled by
> the phase tolerance constraint established in the DP rules. Is this
> correct?
>
> Regards,
>
> Austin
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