[PCB_FORUM] Re: Constraints being deleted upon net in.
- From: "Budathoki, Trilok (GE Indust, ConsInd)" <trilok.budathoki@xxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Thu, 16 Mar 2006 10:43:41 +0530
Daniel
We do face this most of time, sometimes copper plane too gets shorteed with all
pins.
You gotta rebuilt your tech file everytime you update schematic. After
importing netlist you have to load tech file in .brd file.
This will solve your problem.
Trilok
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx]On Behalf Of Daniel So
Sent: Thursday, March 16, 2006 1:08 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Constraints being deleted upon net in.
Hi all
We use Concept for out schematics and Allegro for PCB but we create and
maintain all constraints in Allegro. Every so often during netin, the voltage
property will get deleted also all properties that were associated to those
same nets would be deleted also. All other nets that have constraints and
properties would be untouched. I looked on Sourcelink for any possible solution
and found this solution below. But this does not explain why it is inconsistent
and why this does not delete different properties off other nets also.
Has anybody else experienced this? This is happening on rel 15.2. I have also
tried this on rel 15.5.1 and it still happens.
Daniel
Solution # 11189396: Repackaging design will remove voltage property in Allegro.
Cadence Customer Support Solution
Error message:
None
Problem statement:
I have the following voltage property values on the following nets in Allegro.
VOLTAGE '0 V'; 'FRMGND' 'GND'
VOLTAGE '3.3 V'; 'P3_3V'
VOLTAGE '1.5 V'; 'CPU_1_5V'
VOLTAGE '12 V'; 'P12V'
When I repackage the design, the voltage property is removed from these nets.
Solution:
In this instance the VOLTAGE property has an origin of schematic even though it
does
not appear to exist in the schematic.
This means when netrev processes the pst files, if it does not see the VOLTAGE
property
in the pstxnet.dat file it will delete them and report it in the eco.txt file
as
follows:
|------------------------------------------------------------------------------|
| NET PROPERTIES deleted from board drawing
|- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
| net name | property | value
|- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - |
CPU_1_5V VOLTAGE 1.5 V
FRMGND VOLTAGE 0 V
GND VOLTAGE 0 V
P12V VOLTAGE 12 V
P3_3V VOLTAGE 3.3 V
To resolve this in Allegro, you can:
1. Re-enter the values on the Identify DC Nets form.
2. Re-enter the values in the Net/Physical worksheet in Constraint Manager.
3. Delete the voltage property and import the values using third party netlist.
Example:
$NETS
$A_PROPERTIES
VOLTAGE '0 V'; 'FRMGND' 'GND'
VOLTAGE '3.3 V'; 'P3_3V'
VOLTAGE '1.5 V'; 'CPU_1_5V'
VOLTAGE '12 V'; 'P12V'
$END
Once the values have been re-entered in Allegro, repackaging will retain the
VOLTAGE
value.
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