Running 14.2, I found a problem where the correct "PRIMITIVE" isn't being pulled from a chips.prt file as part of the compilation/packaging process. If you look at the final PRIMITIVE in the chips.prt file, it is for RELAYDPDT_RKA11DZ12. However, the PRIMITIVE that gets pulled into the pstchip.dat file is the first PRIMITIVE in the file, not the one referred to by the PACK_TYPE property that is on the relays in the schematic. Obviously, since the pinouts are different, the design doesn't exactly work as intended... Both the design and the library entry are "old", dating back 10 years or so. Both have been through the chdl_uprev process from Allegro V12 to V13, and further updated to 14.2, if that matters... Anyone have any light to shed on this? I've opened up a case with my friendly local Cadence aps engineer...we'll see what they have to say...and I'll try finding any useful references on sourcelink, but I figured if this is a common problem, somebody out on the list has already solved it and can chime in quicker than Cadence will... /s/jar (alan.ritter@xxxxxxxxxx) http://www.mtritter.org Bausch & Lomb 150 Years of Perfecting Vision, Enhancing Life (TM) EMAIL DISCLAIMER Please Note: The information contained in this message may be privileged and confidential, protected from disclosure, and/or intended only for the use of the individual or entity named above. If the reader of this message is not the intended recipient, or an employee or agent responsible for delivering this message to the intended recipient, you are hereby notified that any disclosure, distribution, copying or other dissemination of this communication is strictly prohibited. If you received this communication in error, please immediately reply to the sender, delete the message and destroy all copies of it. Thank You