Minutes from the 7 February 2017 ibis-atm meeting are attached.
Mike
IBIS Macromodel Task Group
Meeting date: 7 February 2017
Members (asterisk for those attending):
ANSYS: * Dan Dvorscak
Curtis Clark
Broadcom (Avago): Xingdong Dai
* Bob Miller
Cadence Design Systems: Ambrish Varma
Brad Brim
Kumar Keshavan
Ken Willis
Cisco: Seungyong (Brian) Baek
eASIC: * David Banas
Marc Kowalski
Ericsson: Anders Ekholm
GlobalFoundries: * Steve Parker
IBM Luis Armenta
Trevor Timpane
Intel: * Michael Mirmak
Keysight Technologies: Fangyi Rao
Radek Biernacki
Ming Yan
Maxim Integrated Products: Hassan Rafat
Mentor Graphics: John Angulo
* Arpad Muranyi
Micron Technology: * Randy Wolff
Justin Butterfield
QLogic Corp.: James Zhou
Andy Joy
SiSoft: * Walter Katz
Todd Westerhoff
* Mike LaBonte
Synopsys: Rita Horner
Kevin Li
Teraspeed Consulting Group: Scott McMorrow
Teraspeed Labs: * Bob Ross
TI: Alfred Chong
The meeting was led by Arpad Muranyi.
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Opens:
- Michael M: It would be good to discuss using AMI for single ended signals.
- Bob Miller: BIRD 147.6
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Review of ARs:
- Fangyi to email his Flow BIRD draft to Mike LaBonte for posting.
- Bob Miller to update BIRD 147.5 to draft 4 and submit it to the Open Forum.
- Done. It was sent as 147.6.
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Call for patent disclosure:
- None.
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Review of Meeting Minutes:
- Arpad: Minutes from the 24 Jan meeting are not yet available.
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New Discussion:
BIRD 147.6:
- Bob Miller showed BIRD 147.6
- Arpad: I would like Vladimir to have a look at this.
- Bob M: The main change is striking a paragraph about the EDA tool setting
Ignore_Bits to BCI_Training_UI if necessary.
- No one objected to the deletion.
- Walter moved to submit BIRD 147.6 to the Open Forum.
- Bob Ross seconded.
- No one objected.
IBIS 6.2:
- Walter: We should restart the editorial group to produce IBIS 6.2.
- We might not issue it, maybe IBIS 7.0 would be the next release.
- Steve P: BIRD 189 can be in that?
- Walter: Yes
Filename BIRD 186.1:
- Walter: Bob R. made many editorial changes to this.
- It looks good.
- We should decide to recommend it in our next meeting.
- Arpad: Bob R. wrote that there is a conflict.
- Bob R: IBIS specifies that all files are in the same directory as the .ibs
file.
- The BIRD says that means same directory or subdirectory.
- The language needed cleanup.
- Walter: Your changes address that.
- Bob R: We define extension as the characters following the dot, not including
it.
- Walter: Bob R will be co-author.
- It should be read carefully ahead of next week.
Redriver Flow BIRD;
- Walter: Fangyi was going to add equations similar to what Todd Westerhoff
presented.
- Also it should have more on requirements, like the packaging BIRD.
- Arpad: I will help Fangyi with equations.
AR: Arpad Muranyi to help Fangyi Rao with equations for Flow BIRD
BIRD 158:
- Arpad: Radek Biernacki may be working on changes to this.
- Walter: We need to get closure on those.
- I asked Ambrish Varma to try to get support within Cadence.
- Bob R: Does this have Tx_Vol and Tx_Voh?
- Walter: No. Radek suggested not doing common mode here.
- His changes are mostly editorial.
- Bob: It is limited to 4 port Touchstone models, that needs to be clear.
- Michael M: We are excluding ISS?
- Arpad: Yes.
Single ended AMI:
- Michael M: DDR5 has equalization, is AMI appropriate for this use?
- Fangyi was concerned about Tx equalization.
- Single ended buffers do not behave as differential.
- Can this be corrected?
- Walter: We do not need to do anything.
- Bob: AMI assumes differential operation.
- Walter: It assumes a single ended impulse response.
- Bob: BIRD 158 assumes complementary inputs.
- Walter: The analog section of the AMI model is differential.
- Michael M: IBIS page 171 addresses single vs. differential models.
- So the models may be different for single ended?
- Walter: AMI_GetWave may be different.
- Interpretation of waveform results may be different.
- Arpad: Single ended can have a DC offset.
- Walter: The EDA tool addresses that, not AMI.
- In differential mode the waveform is symmetric around zero.
- In DDR5 the waveform is symmetric around a Vref.
- Arpad: The spec calls for -0.5 to +0.5 as the stimulus.
- Walter: That can be relative to Vref_DQ.
- Mike L: How does the tool know when a model is single ended?
- Arpad: AMI assumes symmetric rise and fall, is that a problem?
- Walter: For DDR5 they are symmetric.
- Bob: The spec says it is LTI but vendors like to go beyond that.
- Walter: We can add separate rise and fall responses but people might ask how
to use it.
- We should wait for model makers to ask for it.
- Bob M: I generally agree with Walter.
- It can be asymmetric but separate rise and fall responses may not work.
- I'm not ready to propose it.
- Michael M: I would like to see data about this.
- Arpad: At the summit it seemed this would be a big issue.
- Bob M: Fangyi was there.
- Questions were asked and answered about DDR5 operation.
- Randy: Will the tool determine what the DC level should be?
- Walter: On-die termination will have to be determined for each channel.
- At that point we will know Vref-DQ.
- One question is how to display it to the user.
- Arpad: Does this change during the simulation?
- Randy: It has to be trained.
- Walter: The JEDEC spec is still in debate.
- Mike L moved to adjourn.
- Bob R seconded.
- Without objection he meeting adjourned.
- Arpad: Thank you all for joining.
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Next meeting: 14 February 2017 12:00pm PT
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IBIS Interconnect SPICE Wish List:
1) Simulator directives
