[openbeos] Re: ARM port
- From: Travis Geiselbrecht <geist@xxxxxxxxxx>
- To: openbeos@xxxxxxxxxxxxx
- Date: Sun, 29 Jun 2008 14:38:10 -0700
On Jun 29, 2008, at 10:52 AM, François Revol wrote:
The boards I'm looking at to use are based on the Cortex A8, it is 2
generations newer, that said I'll have to look into the differences
between V6 (ARM 11) and V7 (A8+) so it doesn't rule out the ARM11.
I already added the needed stuff to binutils, might look into gcc
but I
have stuff to prepare for RMLL.
OTH I could arrange a workshop on porting Haiku to ARM there :D
I suggest you see how uboot works, didn't look much myself yet.
The biggest difference in the v7 stuff for os supporting is the
different cache architecture. ARM changed the cache control bits again
for the cortex, and now it's somewhat more complicated, but it should
be documented if you have the arm v7 docs. Seeing as Nicholas works
for ARM he should be able to get ahold of it legitimately. Other than
that, it's for the most part just the same as v6. Thankfully the cache
is now fully physically coherent, so none of that cache flushing mess
that you have to do on earlier arms, and some of the v6s.
Fully supporting thumb2 + neon + lazy fpu save is a bit more of a
challenge as well, since the kernel has to have enough knowledge to
decode the instructions and differentiate between a real bad
instruction and just a disabled fpu instruction.
One area that haiku may bump into trouble is the general lack of
support for systems with dma incoherent devices. Most oses have some
sort of knowledge of this, and let you allocate regions with cache
disabled and whatnot to make it easier to sync with dma that happens
in the background. Without it you'll probably have to overly flush the
cache in the low level drivers and there still may be some cache line
aliasing issues. Shouldn't be too bad, since most of the drivers would
need to be custom to the board anyway.
travis
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